74HC595is fabricated with high-speed silicon gate CMOS technology. It contains an 8-bit serial-in, serial or parallel-out shift register and an 8-bit D-type storage register with parallel 3-state outputs. The shift and storage register have independent clock inputs. Both the shift register clock (SRCK) and storage register clock (RCK) are positive-edge triggered.
74HC595 Features
- •8-bit serial-in, parallel-out shift register with storage
- •Shift register has direct clear
- •8-bit D-type storage register with parallel 3-state outputs
- •Two independent clocks for shift and storage register
- •Wide operating power supply voltage 2-6V
- •Low input current < 1μA
- •Low power consumption, Max. 80μA (74HC595)
- •Output driving capacity ± 6 mA at 5V
- •Typical propagation delay 13nS
Logic Diagram
The shift register has a direct overriding clear input (SRCL), serial data input (SER), and serial outputs for cascading. When the output-enable (OE) input is high, the outputs are in the high-impedance state. If both clocks are connected together, the shift register always is one clock pulse ahead of the storage register.
IF you want know more about 74HC595 please download 74HC595 datasheet pdf.