SN74AVC1T45 Datasheet

Voltage Levels Single-Bit Bus Transceiver


The SN74AVC1T45 is designed for asynchronous communication between two data buses. The logic levels of the direction-control (DIR) input activate either the B-port outputs or the A-port outputs. The device transmits data from the A bus to the B bus when the B-port outputs are activated and from the B bus to the A bus when the A-port outputs are activated. The input circuitry on both A and B ports always is active and must have a logic HIGH or LOW level applied to prevent excess ICC and ICCZ. SN74AVC1T45 Features &middot; Available in the Texas Instruments NanoFree&trade; Package&middot; Fully Configurable Dual-Rail Design Allows Each Port to Operate Over the Full 1.2-V to 3.6-V Power-Supply Range&middot; VCC Isolation Feature - If Either VCC Input Is at GND, Both Ports Are in the High-Impedance State&middot; DIR Input Circuit Referenced to VCCA&middot; &plusmn;12-mA Output Drive at 3.3 V&middot; I/Os Are 4.6-V Tolerant&middot; Ioff Supports Partial-Power-Down Mode Operation&middot; Typical Max Data Rates &ndash; 500 Mbps (1.8-V to 3.3-V Translation) &ndash; 320 Mbps (<1.8-V to 3.3-V Translation) &ndash; 320 Mbps (Translate to 2.5 V or 1.8 V) &ndash; 280 Mbps (Translate to 1.5 V)&ndash; 240 Mbps (Translate to 1.2 V)&middot; Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II&middot; ESD Protection Exceeds JESD 22 &ndash; 2000-V Human-Body Model (A114-A) &ndash; 200-V Machine Model (A115-A) &ndash; 1000-V Charged-Device Model (C101)


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