Summary of Tsinghua AI Chip Report Four

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/ 2018-11-28 / Tech

We have talked something about AI basics and development as well as the AI scholars at "Summary of Tsinghua AI Chip Report One" and "Summary of Tsinghua AI Chip Report two". In part three"Summary of Tsinghua AI Chip Report three",we learned some knowledge about AI chip industry and trends as well as representative enterprise in AI chip. This part,we will introduce the futher development trends of AI chips.

Five development trends of AI chips

Therefore, the next generation of AI chips will have the following five development trends.

A. Higher Efficient Large Convolution Deconstruction/Multiplexing

On the basis of standard SIMD, CNN can further reduce data communication on bus due to its special multiplexing mechanism. The concept of reuse is particularly important in super-large neural networks. How to decompose and map these super-large convolutions to effective hardware has become a research direction.

B. Lower Inference Computing/Storage Bit Width

One of the biggest evolution directions of AI chips may be the rapid reduction of parameters/computational bit widths of neural networks - from 32-bit floating-point to 16-bit floating-point/fixed-point, 8-bit fixed-point, or even 4-bit fixed-point. In the field of theoretical calculation, the bit width of two or even one bit parameters has gradually entered the field of practice.

C. More customized memory design

When computational components are no longer the bottleneck of the design of neural network accelerators, how to reduce memory access delay will become the next research direction. Usually, the faster the memory is close to the computation, the higher the cost per byte, and the more limited the capacity, so a new storage structure will emerge as the times require.

D. More sparse large-scale vector implementation

Although the neural network is large, in fact, there are many cases of zero input, at this time sparse computing can effectively reduce the useless energy efficiency. The team from Harvard University put forward an optimized five-stage pipeline junction to solve the problem, and output the trigger signal at the last stage. After the Activation layer, the necessity of the next calculation is pre-judged. If it is found that this is a sparse node, the SKIP signal is triggered to avoid the power consumption of multiplication operation, so as to reduce the useless power consumption.

E. Integration of Computing and Storage

The key point of process-in-memory technology is to use new non-volatile storage devices (such as ReRAM) and add neural network computing function to the storage array, thus eliminating data migration operation, that is to say, to realize the integration of computing and storage of neural network processing, in terms of power consumption performance. Significant improvement was achieved.

 

Chi-tung believes that AI technology has made breakthroughs in recent years. As an important physical basis of AI technology, AI chips have great industrial value and strategic position. But from the general trend, it is still in the primary stage of AI chip development, and there is a huge space for innovation in both scientific research and industrial applications. Now not only Yingweida, Google and other international giants have launched new products, Baidu, Ali and other domestic layout in this area, but also the birth of the Cambrian AI chip start-up companies. Under the circumstance that the traditional chip fields such  as CPU and GPU are quite different from the international ones, AI chips in China are expected to overtake in bends.


Keywords: AI Chip
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