The is a monolithic 9-bit inverter. The device contains nine inverting buffer gates with single input and output. All inputs have 50 k pull-down resistors. 2000V ESD protection Pin/function compatible with 100121 Voltage compensated operating range to -5.7V Available to MIL-STD-883Features
If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Above which the useful life may be impaired to +150�C Storage Temperature (TSTG) Maximum Junction Temperature (TJ) Ceramic +175�C Plastic to +0.5V VEE Pin Potential to Ground Pin Input Voltage (DC) VEE to +0.5V Output Current (DC Output HIGH) -50 mACase Temperature (TC) Military Supply Voltage (VEE) to -4.2V
Note 1: Absolute maximum ratings are those values beyond which the device may be damaged or have its useful life impaired. Functonal operation under these conditions is not implied. Note 2: ESD testing conforms to MIL-STD-883, Method 3015.
VEE to -5.7V, VCC = VCCA = GND, to +125�C Symbol VOH Parameter Output HIGH Voltage Min -1025 -1085 VOL Output LOW Voltage -1830 VOHC Output HIGH Voltage -1035 -1085 VOLC Output LOW Voltage -1610 -1555 VIH VIL IIL IIH Input HIGH Voltage Input LOW Voltage Input LOW Current Input HIGH Current IEE Power Supply Current Max Units mA TC O�C to +125�C
Note F100K 300 Series cold temperature testing is performed by temperature soaking (to guarantee junction temperature equals -55�C), then testing immediately without allowing for the junction temperature to stabilize due to heat dissipation after power-up. This provides "cold start" specs which can be considered a worst case condition at cold temperatures. Note 4: Screen tested 100% on each device -55�C, +25�C, and +125�C, Subgroups and 8. Note 5: Sample tested (Method 5005, Table I) on each manufactured lot -55�C, +25�C and +125�C, Subgroups 3, 7, and 8. Note 6: Guaranteed by applying specified input condition and testing VOH/VOL.
Guaranteed HIGH Signal for All Inputs Guaranteed LOW Signal for All Inputs VEE = -4.2V VIN = VIL (Min) VEE = -5.7V VIN = VIH (Max) Inputs Open
VEE to -5.7V, VCC = VCCA = GND Symbol tPLH tPHL tTLH tTHL Parameter Propagation Delay Data to Output Transition Time = -55�C Min 0.30 Max = +25�C Min 0.40 Max = +125�C Min 0.40 Max 1.80 ns (Notes Units Conditions Notes
Note F100K 300 Series cold temperature testing is performed by temperature soaking (to guarantee junction temperature equals -55�C), then testing immediately after power-up. This provides "cold start" specs which can be considered a worst case condition at cold temperatures. Note 8: Screen tested 100% on each device at +25�C temperature only, Subgroup A9. Note 9: Sample tested (Method 5005, Table I) on each mfg. lot at +25�C, Subgroup A9, and at +125�C and -55�C temperatures, Subgroups A10 and A11. Note 10: Not tested +25�C, +125�C, and -55�C temperature (design characterization data). Note 11: The propagation delay specified is for single output switching. Delays may vary 200 ps with multiple outputs switching.
Notes: VCC, VCCA = +2V, VEE -2.5V L1 and L2 = equal length 50 impedance lines = 50 terminator internal to scope Decoupling 0.1 �F from GND to VCC and VEE All unused outputs are loaded with 50 to GND CL = Fixture and stray capacitance 3 pF