100328QIX Datasheet

Bipolar->ECL 100 Family


Features, Applications
100328 Low Power Octal ECL/TTL Bi-Directional Translator with Latch

The is an octal latched bi-directional translator designed to convert TTL logic levels to 100K ECL logic levels and vice versa. The direction of this translation is determined by the DIR input. A LOW on the output enable input (OE) holds the ECL outputs in a cut-off state and the TTL outputs at a high impedance level. A HIGH on the latch enable input (LE) latches the data at both inputs even though only one output is enabled at the time. A LOW on LE makes the 100328 transparent. The cut-off state is designed to be more negative than a normal ECL LOW level. This allows the output emitter-followers to turn off when the termination supply is -2.0V, presenting a high impedance to the data bus. This high impedance reduces termination power and prevents loss of low state noise margin when several loads share the bus. The 100328 is designed with FAST TTL output buffers, featuring optimal DC drive and capable of quickly charging and discharging highly capacitive loads. All inputs have 50 k pull-down resistors.


s Identical performance to the 50% of the supply current s Bi-directional translation s 2000V ESD protection s Latched outputs s FAST TTL outputs s 3-STATE outputs s Voltage compensated operating range -5.7V s Available to industrial grade temperature range

Order Number 100328QC 100328QI Package Number N24E V28A Package Description 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.400 Wide 28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square 28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square Industrial Temperature Range to +85�C)

Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.

Pin Names OE LE DIR Description ECL Data I/O TTL Data I/O Output Enable Input Latch Enable Input Direction Control Input

FAST is a registered trademark of Fairchild Semiconductor Corporation.

OE DIR LE ECL Port LOW (Cut-Off) Input LOW (Cut-Off) Latched Input (Note 1)(Note 3) (Note 2)(Note 3) (Note 1)(Note 4) (Note 1)(Note 4) (Note 2)(Note 4) (Note 2)(Note 4) (Note 2)(Note 4)

H = HIGH Voltage Level L = LOW Voltage Level X = Don't Care Z = High Impedance Note 1: ECL input to TTL output mode. Note 2: TTL input to ECL output mode. Note 3: Retains data present before LE set HIGH. Note 4: Latch is transparent.

Storage Temperature (TSTG) VEE Pin Potential to Ground Pin VTTL Pin Potential to Ground Pin ECL Input Voltage (DC) ECL Output Current (DC Output HIGH) TTL Input Voltage (Note 6) TTL Input Current (Note 6) Voltage Applied to Output in HIGH State 3-STATE Output Current Applied to TTL Output in LOW State (Max) ESD (Note 7) twice the rated IOL (mA)

Case Temperature (TC) Commercial Industrial ECL Supply Voltage (VEE) TTL Supply Voltage (VTTL) to +85�C

Note 5: The "Absolute Maximum Ratings" are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum rating. The "Recommended Operating Conditions" table will define the conditions for actual device operation. Note 6: Either voltage limit or current limit is sufficient to protect inputs. Note 7: ESD testing conforms to MIL-STD-883, Method 3015.

Commercial Version TTL-to-ECL DC Electrical Characteristics (Note 8)

VEE to -5.7V, VCC = VCCA = GND, to +85�C, VTTL to +5.5V Symbol VOH VOL Parameter Output HIGH Voltage Output LOW Voltage Cutoff Voltage -2000 VOHC VOLC VIH VIL IIH IIL VFCD IEE Output HIGH Voltage Corner Point HIGH Output LOW Voltage Corner Point LOW Input HIGH Voltage Input LOW Voltage Input HIGH Current Breakdown Test Input LOW Current Input Clamp Diode Voltage VEE Supply Current mA mV Min -1025 -1830 Typ -955 -1705 Max -870 -1620 Units mV Conditions VIN = VIH(Max) or VIL(Min) Loading with OE or DIR LOW, VIN = VIH(Max) or VIL(Min), Loading with �A V VIN = VIH(Min) or VIL(Max) Loading with to -2V Over VTTL, VEE, TC Range Over VTTL, VEE, TC Range VIN = +2.7V VIN = +5.5V VIN = +0.5V IIN mA LE LOW, OE and DIR HIGH Inputs OPEN VEE to -4.8V VEE to -5.7V

Note 8: The specified limits represent the "worst case" value for the parameter. Since these values normally occur at the temperature extremes, additional noise immunity and guardbanding can be achieved by decreasing the allowable system operating ranges. Conditions for testing shown in the tables are chosen to guarantee operation under "worst case" conditions.



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Manufacturer information

Warm Hint

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