Low power CMOS technology 500 �A typical active current 250 nA typical standby current Organized as 16 bytes x 8 bits 2-wire serial interface bus, I2CTM compatible 100 kHz (1.8V) and 400 kHz (5V) compatibility Self-timed write cycle (including auto-erase) 4 ms maximum byte write cycle time 1,000,000 erase/write cycles guaranteed ESD protection > 4 kV Data retention > 200 years 8L DIP, SOIC, TSSOP and 5L SOT-23 packages Temperature ranges available: - Commercial (C): +70�C - Industrial (I): +85�C - Automotive (E): to +125�CDESCRIPTION
The Microchip Technology Inc. a 128-bit Electrically Erasable PROM memory organized x 8 with a 2-wire serial interface. Low voltage design permits operation down to 1.8 volts for the 24xx00 version, and every version maintains a maximum standby current of only 1 �A and typical active current of only 500 �A. This device was designed for where a small amount of EEPROM is needed for the storage of calibration values, ID numbers or manufacturing information, etc. The 24xx00 is available in 8-pin PDIP, 8-pin SOIC (150 mil), 8-pin TSSOP and the 5-pin SOT-23 packages.
is a trademark of Philips Corporation. *24xx00 is used in this document as a generic part number for the 24AA00/24LC00/24C00 devices.Function Ground Serial Data Serial Clock 5.5V (24C00)
VCC...................................................................................7.0V All inputs and outputs w.r.t. VSS............... -0.6V to VCC +1.0V Storage temperature..................................... to +150�C Ambient temp. with power to +125�C Soldering temperature of leads (10 seconds)............. +300�C ESD protection on all pins................................................4 kV
*Notice: Stresses above those listed under "Maximum ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability.
All Parameters apply across the recom- Commercial (C): Tamb to +70�C, VCC to 6.0V mended operating ranges unless other- Industrial (I): Tamb to +85�C, VCC to 6.0V Automotive (E) Tamb to +125�C, VCC to 5.5V wise noted Parameter SCL and SDA pins: High level input voltage Low level input voltage Hysteresis of Schmitt trigger inputs Low level output voltage Input leakage current Output leakage current Pin capacitance (all inputs/outputs) Operating current Standby current Symbol VIH VIL VHYS VOL ILI ILO CIN, COUT ICC Write ICC Read ICCS -10 --.05 VCC Min. 0.7 VCC 0.3 VCC Max. Units mA �A (Note) Vcc 2.5V (Note) IOL = 3.0 mA, VCC = 4.5V IOL = 2.1 mA, VCC = 2.5V VIN = VCC or VSS VOUT = VCC or VSS VCC = 5.0V (Note) Tamb = 1 MHz VCC = 5.5V, SCL = 400 kHz VCC = 5.5V, SCL = 400 kHz VCC = 5.5V, SDA = SCL = VCC ConditionsNote: This parameter is periodically sampled and not 100% tested.
Commercial (C): Industrial (I): Automotive (E): Symbol FCLK Min CB 1M Tamb to +70�C, VCC to 6.0V Tamb to +85�C, VCC to 6.0V Tamb to +125�C, VCC to 5.5V Max Units kHz Conditions 4.5V Vcc 5.5V (E Temp range) 1.8V Vcc 4.5V Vcc 6.0V 4.5V Vcc 5.5V (E Temp range) 1.8V Vcc 4.5V Vcc 6.0V 4.5V Vcc 5.5V (E Temp range) 1.8V Vcc 4.5V Vcc 6.0V 4.5V Vcc 5.5V (E Temp range) 1.8V Vcc 4.5V Vcc 6.0V (Note 1) 4.5V Vcc 5.5V (E Temp range) 1.8V Vcc 4.5V Vcc 6.0V 4.5V Vcc 5.5V (E Temp range) 1.8V Vcc 4.5V Vcc 6.0V (Note 2) 4.5V Vcc 5.5V (E Temp range) 1.8V Vcc 4.5V Vcc 6.0V 4.5V Vcc 5.5V (E Temp range) 1.8V Vcc 4.5V Vcc 6.0V 4.5V Vcc 5.5V (E Temp range) 1.8V Vcc 4.5V Vcc 6.0V 4.5V Vcc 5.5V (E Temp range) 1.8V Vcc 4.5V Vcc 6.0V (Note 100 pF (Notes 1, 3)
All Parameters apply across all recommended operating ranges unless otherwise noted Parameter Clock frequencySDA and SCL rise time (Note 1) SDA and SCL fall time START condition hold time
Data input hold time Data input setup time
Output valid from clock (Note 2) Bus free time: Time the bus must be free before a new transmission can start Output fall time from VIH minimum to VIL maximum Input filter spike suppression (SDA and SCL pins) Write cycle time Endurance
Note 1: Not 100% tested. CB = total capacitance of one bus line in pF. As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region (minimum 300 ns) of the falling edge of SCL to avoid unintended generation of START or STOP conditions. 3: The combined TSP and VHYS specifications are due to new Schmitt trigger inputs which provide improved noise spike suppression. This eliminates the need for a TI specification for standard operation. 4: This parameter is not tested but guaranteed by characterization. For endurance estimates in a specific application, please consult the Total Endurance Model which can be obtained on Microchip's BBS or website.