Monolithic Design High Slew Rate Low Offset/Drift Voltage Low Gate Leakage: 5 pA Low Noise: 9 nV/Hz High CMRR: 100 dB
D Tight Differential Match vs. Current D Improved Op Amp Speed, Settling Time Accuracy D Minimum Input Error/Trimming Requirement D Insignificant Signal Loss/Error Voltage D High System Sensitivity D Minimum Error with Large Input SignalAPPLICATIONS
D Wideband Differential Amps D High-Speed, Temp-Compensated, Single-Ended Input Amps D High Speed Comparators D Impedance ConvertersDESCRIPTION
The low cost 2N3958 JFET dual is designed for high-performance differential amplification for a wide range of precision test instrumentation applications. This series features tightly matched specs, low gate leakage for accuracy, and wide dynamic range with IG guaranteed at VDG 20 V. The hermetically-sealed TO-71 package is available with full military processing (see Military Information and the 2N5545/5546/5547JANTX/JANTXV data sheet).
For similar products see 2N5196/5197/5198/5199, the low-noise U/SST401 series, the high-gain 2N5911/5912, and the low-leakage U421/423 data sheets.
Gate-Drain, Gate-Source Voltage. �50 V Gate Current. 50 mA Lead Temperature (1/16" from case for 10 sec.). 300 _C Storage Temperature. to 200_C Operating Junction Temperature. to 150_C Document Number: B, 04-Jun-01 Power Dissipation : Per Sidea. 250 mW Totalb. 500 mWNotes a. Derate 2 mW/_C above 85_C b. Derate 4 mW/_C above 85_C www.vishay.com
Gate-Source Breakdown Voltage Gate-Source Cutoff Voltage Saturation Drain Currentb Gate Reverse Current V(BR)GSS VGS(off) IDSS IGSS = �1 mA, VDS 0 V VDS 1 nA VDS 20 V, VGS 0 V VGS �30 V, VDS = 150_C VDG TA =125_C VDG = 1 mA, VDS pA nA
Common-Source Forward Transconductance Common-Source Output Conductance Common-Source Input Capacitance Common-Source Reverse Transfer Capacitance Drain-Gate Capacitance Equivalent Input Noise Voltage Noise Figure gfs gos Ciss Crss Cdg en NF VDS 20 V, VGS MHz VDG V, IS MHz VDS 20 V, VGS = 1 kHz VDS 20 V, VGS 100 Hz, 9 0.5 VDS 20 V, VGS kHz nV/ pF mS
Differential Gate-Source Voltage Gate-Source Voltage Differential Change with Temperature GS1�V GS2| D|V G1�I G2| CMRR VDG = 125_C VDG 200 mA VDG 200 mA VDG 25 mV mV/_CDifferential Gate Current Common Mode Rejection Ratioc
Notes a. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. b. Pulse test: v300 ms duty cycle v3%. c. This parameter not registered with JEDEC.Drain Current and Transconductance vs. Gate-Source Cutoff Voltage
5 IDSS � Saturation Drain Current (mA) 3 gfs � Forward Transconductance (mS) G � Gate Leakage 1 nA IGSS 50 mA IGSS 50 mA5 VGS(off) = �2 Drain Current (mA) D � Drain Current (mA) 4 5