2SB808 Datasheet

PNP Epitaxial Planar Silicon Transistor, Low-voltage Larg-current Amp Application


Features, Applications


Parameter Collector-to-Base Voltage Collector-to-Emitter Voltage Emitter-to-Base Voltage Collector Current Collector Current (Pulse) Collector Dissipation Junction Temperature Storage Temperature Symbol VCBO VCEO VEBO IC ICP PC Tj Tstg Conditions

Parameter Collector Cutoff Current Emitter Cutoff Current DC Current Gain Gain-Bandwidth Product Common Base Output Capacitance Symbol ICBO IEBO hFE2 fT Cob VCE=(�)2V, IC=(�)500mA Pulse VCB=(�)10V, f=1MHz MHz pF Conditions Ratings min typ max (�)1.0 960* Unit �A

Any and all SANYO products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircraft's control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. Consult with your SANYO representative nearest you before using any SANYO products described or contained herein in such applications. SANYO assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges,or other parameters) listed in products specifications of any and all SANYO products described or contained herein.

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Parameter Collector-to-Emitter Saturation Voltage Collector-to-Emitter Saturation Voltage Base-to-Emitter Saturation Voltage Collector-to-Base Breakdown Voltage Collector-to-Emitter Breakdown Voltage Emitter-to-Base Breakdown Votage Symbol VCE(sat)1 VCE(sat)2 VBE(sat) Conditions IC=(�)100mA, IB=(�)10mA Ratings min typ IC=(�)100mA, IB=(�)10mA V(BR)CBO IC=(�)10�A, IE=0 V(BR)CEO IC=(�)1mA, RBE= V(BR)EBO IE=(�)10�A, IC=0 max Unit mV

Sample Application Circuit : Low-voltage 3V (PO 120mW) ITL-OTL power amplifier. Circuit configuration For obtaining an output of more than 100mW, the middle-point voltage at the output stage and the collector voltage of the driver transistor must be VCC/2. Therefore, the output stage is of quasi complementary configuration composed of npn/npn transistors. The phase is reversed by the 2SA608 and the middle-point voltage are the output stage and the collector voltage of the driver transistor are more VCC/2 so that the output can be maximized.

R1 : Used control idle current For R1=820, use rank F for 5 (2SD1012)]. For R1=680, use rank G for 5 (2SD1012)].

Characteristic Current dissipation Output power Votlage gain Total harmonic distortion Input resistance PO=50mW PO=10mW Conditions Quiescent, total current dissipation to 21.0 Unit % k



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