The IDT49C466/A 64-bit Flow-thruEDC is a high-speed error detection and correction unit that ensures data integrity in memory systems. The flowthru architecture, with separate system and memory data buses, is ideally suited for pipelined memory systems. Implementing a modified Hamming code, the IDT49C466/A corrects all single bit hard and soft errors, and detects all double bit errors. The read/ write FIFOs can store up to sixteen words. FIFO full and empty flags indicate whether additional data can be written to or read from the EDC. Check bit generation for partial word writes on byte boundaries is supported on the IDT49C466/A. Diagnostic features include a check bit register, syndrome registers, a four bit error counter which logs up to fifteen errors, and an error data register which stores the complete error data word. Parity can be generated and checked on the system bus by the IDT49C466/A.
64-bit wide Flow-thruEDCTM Separate System and Memory Data Input/Output Buses Error Detect Time: 10ns Error Correct Time: 15ns Corrects all single bit errors; Detects all double bit errors and some multiple bit errors Configurable 16-deep bus read/write FIFOs with flags Simultaneous check bit generation and correction of memory data Supports partial word writes on byte boundaries Low noise output Sophisticated error diagnostics and error logging Parity generation on system data bus 208-pin Plastic Quad Flatpack
DIAGNOSTIC & STATUS REGISTERS ERR ME RR CHECK-BIT COMPARATO R & SYNDRO ME GENERATOR & ERROR DETECTOR U X ERROR CORRECTW RITE BUFFER 16 W ORDS BY 72 PARITY GENERATE & PARITY CHECK
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DIAGNOSTIC REGISTERS 0-7 CHKBIT (ON 1ST ERROR) SYNDROM E (ON 1ST ERROR) ERR COUNT 28-29 ERR TYPE ERR MERR CLEAR