49FCT3805 Datasheet

Dual 1:5 Clock Driver


Features, Applications

0.5 MICRON CMOS Technology Guaranteed low skew < 500ps (max.) Very low duty cycle distortion < 1.0ns (max.) Very low CMOS power levels TTL compatible inputs and outputs Inputs can be driven from or 5V components Two independent output banks with 3-state control 1:5 fanout per bank "Heartbeat" monitor output VCC � 0.3V Available in SSOP, SOIC, and QSOP packages

The a 3.3 volt, non-inverting clock driver built using advanced dual metal CMOS technology. The device consists of two banks of drivers, each with a 1:5 fanout and its own output enable control. The device has a "heartbeat" monitor for diagnostics and PLL driving. The MON output is identical to all other outputs and complies with the output specifications in this document. The FCT3805 offers low capacitance inputs with hysteresis. The FCT3805 is designed for high speed clock distribution where signal quality and skew are critical. The FCT3805 also allows single point-topoint transmission line driving in applications such as address distribution, where one signal must be distributed to multiple recievers with low skew and high signal quality.

The IDT logo is a registered trademark of Integrated Device Technology, Inc.

Symbol VTERM(3) VTERM(4) TSTG IOUT Description Terminal Voltage with Respect to GND Terminal Voltage with Respect to GND Terminal Voltage with Respect to GND Storage Temperature DC Output Current Max to +60 Unit �C mA

Pin Names OEA, OEB INA, INB OAn, OBn MON Clock Inputs Clock Outputs Monitor Output Description 3-State Output Enable Inputs (Active LOW)

NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. VCC terminals. 3. Input terminals. 4. Outputs and I/O terminals.

NOTE: 1. This parameter is measured at characterization but not tested.

Following Conditions Apply Unless Otherwise Specified Commercial: to +70�C, Industrial: to +85�C, VCC � 0.3V

Symbol VIH VIL IIH IIL IOZH IOZL VIK IODH IODL VOH VOL Parameter Input HIGH Level (Input pins) Input HIGH Level (I/O pins) Input LOW Level (Input and I/O pins) Input HIGH Current (Input pins) Input HIGH Current (I/O pins) Input LOW Current (Input pins) Input LOW Current (I/O pins) High Impedence Output Current (3-State Output Pins) Clamp Diode Voltage Output HIGH Current Output LOW Current Output HIGH Voltage Output LOW Voltage VCC = Min., IIN = �18mA VCC = 3.3V, VIN = VIH or VIL, = 1.5V(3) VCC = 3.3V, VIN = VIH or VIL, = 1.5V(3) VCC = Min. VIN = VIH or VIL VCC = Min. VIN = VIH or VIL IOFF IOS VH ICCL ICCH ICCZ

NOTES: 1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at Vcc 3.3V, +25�C ambient. 3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second. 4. This parameter is guaranteed but not tested. 5. VOH = Vcc 0.6V at rated current.

Test Conditions(1) Guaranteed Logic HIGH Level Guaranteed Logic LOW Level VCC = Max. VCC = Max. VCC = Max. VI = VCC VI = GND VI = GND VO = VCC VO = GND

Input Power Off Leakage Short Circuit Current(4) Input Hysteresis Quiescent Power Supply Current



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