Homedatasheet54AC821L

54AC821L Datasheet

10-bit D Flip-flop With Tri-state Outputs
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Description

Features, Applications

The 10-bit D flip-flop with TRI-STATE outputs arranged in a broadside pinout. The 'AC/'ACT821 is functionally identical to the AM29821. Noninverting outputs Outputs source/sink mA 'ACT821 has TTL-compatible inputs Standard Microcircuit Drawing (SMD) 'AC821: 5962-91606

Features
Description Data Inputs Data Outputs Output Enable Input Clock Input

TRI-STATE is a registered trademark of National Semiconductor Corporation. FACT is a registered trademark of Fairchild Semiconductor Corporation.

The 'AC/'ACT821 consists of ten D-type edge-triggered flip-flops. The buffered Clock (CP) and buffered Output Enable (OE) are common to all flip-flops. The flip-flops will store the state of their individual D inputs that meet the setup and hold time requirements on the LOW-to-HIGH CP transition. With OE LOW the contents of the flip-flops are available at the outputs. When OE is HIGH the outputs go to the high impedance state. Operation of the OE input does not affect the state of the flip-flops. The 'AC/'ACT821 is functionally and pin compatible with the AM29821.

H = HIGH Voltage Level L = LOW Voltage Level Z = HIGH Impedance N = LOW-to-HIGH Clock Transition

Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.

If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage (VCC) DC Input Diode Current (IIK) VI = VCC 0.5V DC Input Voltage (VI) DC Output Diode Current (IOK) VO = VCC 0.5V DC Output Voltage (VO) DC Output Source or Sink Current (IO) DC VCC or Ground Current per Output Pin (ICC or IGND) Storage Temperature (TSTG) Junction Temperature (TJ) CDIP -0.5V to VCC -0.5V to VCC + 0.5V

Supply Voltage (VCC) 'AC 'ACT Input Voltage (VI) Output Voltage (VO) Operating Temperature (TA) 54AC/ACT Minimum Input Edge Rate (V/t) 'AC Devices VIN from 70% of VCC 4.5V, 5.5V Minimum Input Edge Rate (V/t) 'ACT Devices VIN from to 2.0V VCC 0V to VCC 0V to VCC to +125�C

Note 1: Absolute maximum ratings are those values beyond which damage to the device may occur. The databook specifications should be met, without exception, to ensure that the system design is reliable over its power supply, temperature, and output/input loading variables. National does not recommend operation of FACT � circuits outside databook specifications.

Symbol VIH Parameter Minimum High Level Input Voltage VIL Maximum Low Level Input Voltage VOH Minimum High Level Output Voltage VCC (V) to +125�C Guaranteed Limits (Note 2) VIN = VIL or VIH IOH mA V IOH -24 mA IOH -24 mA IOUT �A V IOUT �A V VOUT 0.1V or VCC 0.1V V VOUT 0.1V or VCC - 0.1V Units Conditions

4.5 5.5 IIN IOZ Maximum Input Leakage Current Maximum TRI-STATE Current 5.5

(Note 2) VIN = VIL or VIH IOL 12 mA IOL 24 mA IOL VI = VCC, GND VI (OE) = VIL, VIH VI = VCC, GND VO = VCC, GND


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