Homedatasheet54ACT16646WD

54ACT16646WD Datasheet

16-bit Bus Transceivers And Registers With 3-state Outputs
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Features, Applications

Members of the Texas Instruments Widebust Family Inputs Are TTL-Voltage Compatible Independent Registers for A and B Buses Multiplexed Real-Time and Stored Data Flow-Through Architecture Optimizes PCB Layout Distributed VCC and GND Pin Configuration Minimizes High-Speed Switching Noise EPICt (Enhanced-Performance Implanted CMOS) 1-mm Process 500-mA Typical Latch-Up Immunity at 125�C Package Options Include Plastic 300-mil Shrink Small-Outline (DL) Packages Using 25-mil Center-to-Center Pin Spacings and 380-mil Fine-Pitch Ceramic Flat (WD) Packages Using 25-mil Center-to-Center Pin Spacings

description

The 'ACT16646 are 16-bit bus transceivers consisting of D-type flip-flops and control circuitry with 3-state outputs arranged for multiplexed transmission of data directly from the data bus or from the internal storage registers. The devices can be used as two 8-bit transceivers or one 16-bit transceiver. Data on the or B bus is clocked into the registers on the low-to-high transition of the appropriate clock (CLKAB or CLKBA) input. Figure 1 illustrates the four fundamental busmanagement functions that can be performed with the bus transceivers and registers.

Output-enable (OE) and direction-control (DIR) inputs are provided to control the transceiver functions. In the transceiver mode, data present at the high-impedance port may be stored in either register or in both. The select controls (SAB and SBA) can multiplex stored and real-time (transparent mode) data. The circuitry used for select control eliminates the typical decoding glitch that occurs in a multiplexer during the transition between stored and real-time data. DIR determines which bus receives data when OE is low. In the isolation mode (OE high), A data may be stored in one register and/or B data may be stored in the other register. When an output function is disabled, the input function is still enabled and may be used to store and transmit data. Only one of the two buses, or B, may be driven at a time. The 74ACT16646 is packaged in TI's shrink small-outline package, which provides twice the functionality of standard small-outline packages in the same printed-circuit-board area. The 54ACT16646 is characterized for operation over the full military temperature range to 125�C. The 74ACT16646 is characterized for operation from to 85�C.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. EPIC and Widebus are trademarks of Texas Instruments Incorporated.

UNLESS OTHERWISE NOTED this document contains PRODUCTION DATA information current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303

BUS B SBA X REAL-TIME TRANSFER BUS A TO BUS B CLKAB or L CLKBA L X SAB X H BUS B SBA H X TRANSFER STORED DATA TO A AND/OR B

FUNCTION TABLE INPUTS OE DIR CLKAB or L CLKBA L X SAB SBA A1�A8 Input Unspecified Input Output Input DATA I/O B1�B8 Unspecified Input Output OPERATION OR FUNCTION Store A, B unspecified{ Store B, A unspecified{ Store A and B data Isolation, hold storage Real-time B data to A bus Stored B data to A bus Real-time A data to B Bus

Stored A data to bus The data-output functions may be enabled or disabled by various signals OE or DIR. Data-input functions are always enabled, i.e., data at the bus terminals is stored on every low-to-high transition of the clock inputs.


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