54FCT574DMQB Datasheet

Octal D-type Flip-flop With Tri-state Outputs


Features, Applications
54FCT574 Octal D-Type Flip-Flop with TRI-STATE Outputs
54FCT574 Octal D-Type Flip-Flop with TRI-STATE � Outputs

The is an octal flip-flop with a buffered common Clock (CP) and a buffered common Output Enable (OE). The information presented to the D inputs is stored in the flip-flops on the LOW-to-HIGH Clock (CP) transition. The device is functionally identical to the 'FCT374 except for the pinouts.


n Inputs and outputs on opposite sides of package allowing easy interface with microprocessors n Useful as input or output port for microprocessors n Functionally identical 'FCT374 n TRI-STATE outputs for bus-oriented applications n Output sink capability of 32 mA, source capability mA n TTL input and output level compatible n CMOS power consumption n Standard Microcircuit Drawing (SMD) 5962-8951301

Military 54FCT574FMQB 54FCT574LMQB Package Number E20A 20-Lead Cerpack 20-Lead Ceramic Leadless Chip Carrier, Type C Package Description 20-Lead Ceramic Dual-In-Line

Pin Names OE O0�O7 Data Inputs Clock Pulse Input (Active Rising Edge) TRI-STATE Output Enable Input (Active LOW) TRI-STATE Outputs Description

TRI-STATE is a registered trademark of National Semiconductor Corporation.

The 'FCT574 consists of eight edge-triggered flip-flops with individual D-type inputs and TRI-STATE true outputs. The buffered clock and buffered Output Enable are common to all flip-flops. The eight flip-flops will store the state of their individual D inputs that meet the setup and hold times requirements on the LOW-to-HIGH Clock (CP) transition. With the Output Enable (OE) LOW, the contents of the eight flip-flops are available at the outputs. When OE is HIGH, the outputs are in a high impedance state. Operation of the OE input does not affect the state of the flip-flops. OE

Data Available Data Available No Change in Data No Change in Data

H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance N = LOW-to-HIGH Transition = No Change

Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.

If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Storage Temperature Ambient Temperature under Bias Junction Temperature under Bias Ceramic VCC Pin Potential to Ground Pin Input Voltage (Note 2) Input Current (Note 2) Voltage Applied to Any Output in the Disabled or Power-Off State in the HIGH State -0.5V to VCC

Current Applied to Output in LOW State (Max) DC Latchup Source Current
Free Air Ambient Temperature Military Supply Voltage Military to +5.5V

Note 1: Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied. Note 2: Either voltage limit or current limit is sufficient to protect inputs.

Symbol VIH VIL VCD VOH VOL IIH IIL IOZH IOZL IOS ICCQ ICC ICCT Parameter Input HIGH Voltage Input LOW Voltage Input Clamp Diode Voltage Output HIGH Voltage Output LOW Voltage Input HIGH Current Input LOW Current Output Leakage Current Output Leakage Current Output Short-Circuit Current Power Supply Current Power Supply Current Additional ICC/Input - 5.5V Max �A Max FCT574 Min 0.8 -1.2 Max �A Min Max Recognized HIGH Signal Recognized LOW Signal IIN -18 mA IOH -300 �A IOH -12 mA IOL 300 �A IOL = 32mA VIN = 2.7V (Note 3) VIN = VCC VIN = 0.5V (Note 3) VIN = 0.0V VOUT = 2.0V VOUT = 2.0V VOUT = 0.0V VIN 0.2V or VIN = 0MHz VIN VI = VCC 2.1V or VIN = GND, fCP = 10MHz, Outputs open, OE = GND, one bit toggling 5MHz, 50% duty cycle 5.3V or VCC = 0.2V, fCP = 10MHz, Outputs open, OE = GND, one bit toggling 5MHz, 50% duty cycle Outputs Open, OE = GND, One bit toggling, 50% duty cycle, VIN 5.3V or VIN = 0.2V Units VCC Conditions



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