74HC573N Datasheet

Octal D-type transparent latch


The 74HC573N is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard no. 7A.The 74HC573N has octal D-type transparent latches featuring separate D-type inputs for each latch and 3-state true outputs for bus-oriented applications. A latch enable(LE) input and an output enable (OE) input are common to all latches. 74HC573N Features • Input levels: -For 74HC573: CMOS level -For 74HCT573: TTL level• Inputs and outputs on opposite sides of package allowing easy interface with microprocessors• Useful as input or output port for microprocessors and microcomputers• 3-state non-inverting outputs for bus-oriented applications• Common 3-state output enable input• Multiple package options• ESD protection: -HBM JESD22-A114F exceeds 2 000 V -MM JESD22-A115-A exceeds 200 V• Specified from 40 ℃ to +85℃ and from 40 ℃ to +125 ℃


[{"Name":"Number of Output Lines","Value":"8"},{"Name":"High Level Output Current","Value":"- 7.8 mA "},{"Name":"Propagation Delay Time","Value":"15 ns "},{"Name":"Supply Voltage - Max","Value":"6 V "},{"Name":"Supply Voltage - Min","Value":"2 V "},{"Name":"Maximum Operating Temperature ","Value":"+ 125 C "},{"Name":"Minimum Operating Temperature","Value":"- 40 C "},{"Name":"","Value":""},{"Name":"","Value":""},{"Name":"","Value":""}]

Manufacturer information

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