74HCT377D Datasheet

Octal D-type flip-flop with data enable


The 74HC/HCT377 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL(LSTTL). They are specified in compliance with JEDEC standard no. 7A.The 74HC/HCT377 have eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. A common clock (CP) input loads all flip-flops simultaneously when the data enable (E) is LOW. The state of each D input, one set-up time before the LOW-to-HIGH clock transition, is transferred to the corresponding output (Qn) of the flip-flop. 74HCT377D Features • Ideal for addressable register applications• Data enable for address and data synchronization applications• Eight positive-edge triggered D-type flip-flops• See“273” for master reset version• See“373” for transparent latch version• See“374” for 3-state version• Output capability: standard• ICC category: MSI


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