Homedatasheet74LVC1G125GW

74LVC1G125GW Datasheet

Logic - Buffers, Drivers, Receivers, Transceivers
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Description

The 74LVC1G125GW is a high-performance, low-power,low-voltage, Si-gate CMOS device, superior to mostadvanced CMOS compatible TTL families.The input can be driven from either 3.3 V or 5 V devices.This feature allows the use of this device in a mixed3.3 V and 5 V environment.This device is fully specified for partial power-downapplications using Ioff. The Ioff circuitry disables the output,preventing the damaging backflow current through thedevice when it is powered down.The 74LVC1G125GW provides one non-inverting buffer/linedriver with 3-state output. The 3-state output is controlledby the output enable input (OE). A HIGH level at pin OEcauses the output to assume a high-impedanceOFF-state. 74LVC1G125GW Features • Wide supply voltage range from 1.65 V to 5.5 V• High noise immunity• Complies with JEDEC standard:– JESD8-7 (1.65 V to 1.95 V)– JESD8-5 (2.3 V to 2.7 V)– JESD8B/JESD36 (2.7 V to 3.6 V).• ±24 mA output drive (VCC = 3.0 V)• CMOS low power consumption• Latch-up performance exceeds 250 mA• Direct interface with TTL levels• Inputs accept voltages up to 5 V• Multiple package options• ESD protection:– HBM EIA/JESD22-A114-B exceeds 2000 V– MM EIA/JESD22-A115-A exceeds 200 V.• Specified from −40 °C to +85 °C and −40 °C to +125 °C
Features

Parameters

[{"Name":"Number of Elements","Value":"1"},{"Name":"Number of Bits per Element","Value":"1"},{"Name":"Current - Output High, Low","Value":"32mA, 32mA"},{"Name":"Voltage - Supply","Value":"1.65 V ~ 5.5 V"},{"Name":"Operating Temperature","Value":"-40°C ~ 125°C"},{"Name":"","Value":""},{"Name":"","Value":""},{"Name":"","Value":""},{"Name":"","Value":""},{"Name":"","Value":""}]

Manufacturer information

ROHM
Warm Hint

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