74LVC2G17GW Datasheet

Dual non-inverting Schmitt trigger with 5 V tolerant input


The 74LVC2G17GW provides two non-inverting buffers with Schmitt trigger input. It is capable of transforming slowly changing input signals into sharply defined, jitter-free output signals. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 V and 5 V environment. This device is fully specified for partial power-down applications using IOFF. The IOFFcircuitry disables the output, preventing the damaging backflow current through the device when it is powered down. 74LVC2G17GW Features • Wide supply voltage range from 1.65 V to 5.5 V• 5 V tolerant input/output for interfacing with 5 V logic• High noise immunity• Complies with JEDEC standard: -JESD8-7 (1.65 V to 1.95 V) -JESD8-5 (2.3 V to 2.7 V) -JESD-8B/JESD36 (2.7 V to 3.6 V)• ESD protection: -HBM JESD22-A114F exceeds 2000 V -MM JESD22-A115-A exceeds 200 V• 24 mA output drive (VCC=3.0V)• CMOS low-power consumption• Latch-up performance exceeds 250 mA• Direct interface with TTL levels• Multiple package options• Specified from -40°Cto+85°C and 40°Cto+125°C 74LVC2G17GW Applications Wave and pulse shapers for highly noisy environments


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Manufacturer information

Warm Hint

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