Homedatasheet74LVCH245APW

74LVCH245APW Datasheet

Bus Transceivers
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Description

The 74LVCH245APW are 8-bit transceivers featuring non-inverting 3-state bus compatible outputs in both send and receive directions. The device features an output enable (OE) input for easy OE controls the outputs so cascading and a send/receive (DIR) input for direction control that the buses are effectively isolated.Inputs can be driven from either 3.3 V or 5 V devices. When disabled, up to 5.5 V can be applied to the outputs. These features allow the use of these devices in mixed 3.3 V and 5 V applications.The 74LVCH245A bus hold on data inputs eliminates the need for external pull-up resistors to hold unused inputs. 74LVCH245APW Features • 5 V tolerant inputsloutputs for interfacing with 5 V logic• Wide supply voltage range from 1.2 V to 3.6 V• CMOS low-power consumption• Direct interface with TTL levels• Inputs accept voltages up to 5.5 V• High-impedance when Vcc = 0 V• Bus hold on all data inputs (74LVCH245A only)• Complies with JEDEC standard: JESD8-7A (1.65 V to 1.95 V) JESD8-5A (2.3 V to 2.7 V) JESD8-C/JESD36 (2.7 V to 3.6 V)• ESD protection: HBM JESD22-A114F exceeds 2000 V MM JESD22-A115B exceeds 200 V CDM JESD22-Cl Ol E exceeds 1000 V• Specified from -40 0C to +85 0C and -40 0C to +125 0C
Features

Parameters

[{"Name":"Input/output Level","Value":"LVTTL"},{"Name":"Output Type","Value":"3-State"},{"Name":"High Level Output CurrentHigh Level Output Current","Value":"- 24 mA"},{"Name":"Low Level Output Current","Value":"24 mA"},{"Name":"Propagation Delay Time","Value":"17 ns"},{"Name":"Supply Voltage - Max","Value":"3.6 V"},{"Name":"Supply Voltage - Min","Value":"1.2 V"},{"Name":"Maximum Operating Temperature","Value":"+ 125 C"},{"Name":"","Value":""},{"Name":"","Value":""}]

Manufacturer information

JIEJIE MICROELECTRONICS CO.,LTD
Warm Hint

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