Homedatasheet24LC01B-I/SN

24LC01B-I/SN Datasheet

24AA01/24LC01B Data Sheet <br> The Microchip Technology Inc. 24AA01/24LC01B (24XX01*) is a 1 Kbit Electrically Erasable PROM. The device is organized as one block of 128 x 8-bit memory with a 2-wire s
Share:
Manufacturer

Description

Features, Applications

Part Number 24AA01 24LC01B Note 1: VCC Range 1.7-5.5 2.5-5.5 Max. Clock Frequency kHz(1) 400 kHz Temp. Ranges I, E

The Microchip Technology Inc. a 1 Kbit Electrically Erasable PROM. The device is organized as one block x 8-bit memory with a 2-wire serial interface. Low-voltage design permits operation down to 1.7V with standby and active currents of only 1 A and 1 mA, respectively. The 24XX01 also has a page write capability for to 8 bytes of data. The 24XX01 is available in the standard 8-pin PDIP, surface mount SOIC, TSSOP, 2x3 DFN, 2x3 TDFN and MSOP packages, and is also available in the 5-lead SOT-23 and SC-70 packages.

Single Supply with Operation down to 1.7V for 24AAXX Devices, 2.5V for 24LCXX Devices Low-Power CMOS Technology: - Read current 1 mA, max. - Standby current 1 A, max. (I-temp) 2-Wire Serial Interface, I2CTM Compatible Schmitt Trigger inputs for Noise Suppression Output Slope Control to eliminate Ground Bounce 100 kHz and 400 kHz Compatibility Page Write Time 3 ms, typical Hardware Write-Protect ESD Protection >4,000V More than 1 Million Erase/Write Cycles Data Retention >200 Years Factory Programmable Available Packages include 8-lead PDIP, SOIC, TSSOP, DFN, TDFN, MSOP, 5-lead SOT-23 and SC-70 Pb-free and RoHS Compliant Temperature Ranges: - Industrial (I): +85�C - Automotive (E): to +125�C

PDIP, MSOP A1 A2 VSS SOT-23/SC-70 SCL Vss SDA Note: Vcc A2 3 VSS 4 VCC WP SCL A1 A2 SOIC, TSSOP DFN/TDFN 8 VCC WP 6 SCL 5 SDA VCC WP SCL SDA

VCC.............................................................................................................................................................................6.5V All inputs and outputs w.r.t. VSS......................................................................................................... -0.3V to VCC +1.0V Storage to +150�C Ambient temperature with power to +125�C ESD protection on all pins...................................................................................................................................................... 4 kV NOTICE: Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability.

DC CHARACTERISTICS Param. No. D10 D11 Sym. VIH VIL VHYS VOL ILI ILO CIN, COUT ICC read Standby current Characteristic WP, SCL and SDA pins High-level input voltage Low-level input voltage Hysteresis of Schmitt Trigger inputs Low-level output voltage Input leakage current Output leakage current Pin capacitance (all inputs/outputs)

Industrial (I): to +85�C, VCC to +5.5V Automotive (E): to +125�C, VCC to +5.5V Min. Typ. Max. Units kHz ns Conditions 2.5V VCC 5.5V 1.7V VCC (24AA01) 2.5V VCC 5.5V 1.7V VCC (24AA01) 2.5V VCC 5.5V 1.7V VCC (24AA01) 2.5V VCC 5.5V 1.7V VCC 2.5V (24AA01) (Note 1) 2.5V VCC 5.5V 1.7V VCC (24AA01) 2.5V VCC 5.5V 1.7V VCC 2.5V (24AA01) (Note 2) 2.5V VCC 5.5V 1.7V VCC (24AA01) 2.5V VCC 5.5V 1.7V VCC (24AA01) 2.5V VCC 5.5V 1.7V VCC (24AA01) 2.5V VCC 5.5V 1.7V VCC (24AA01) AC CHARACTERISTICS Param. No. Sym. FCLK THIGH TLOW TR TF THD:STA TSU:STA THD:DAT TSU:DAT TSU:STO TAA TBUF Characteristic Clock frequency Clock high time Clock low time SDA and SCL rise time (Note 1) SDA and SCL fall time Start condition hold time Start condition setup time Data input hold time Data input setup time Stop condition setup time Output valid from clock (Note 2) Bus free-time: Time the bus must be free before a new transmission can start Output fall time from VIH minimum to VIL maximum Input filter spike suppression (SDA and SCL pins) Write cycle time (byte or page) Endurance

Not 100% tested. CB = total capacitance of one bus line in pF. As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region (minimum 300 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions. The combined TSP and VHYS specifications are due to new Schmitt Trigger inputs which provide improved noise spike suppression. This eliminates the need for a TI specification for standard operation. This parameter is not tested but ensured by characterization. For endurance estimates in a specific application, please consult the Total EnduranceTM Model which can be obtained from Microchip's web site at www.microchip.com.


Features

Parameters

Download DataSheet PDF View and Download


Manufacturer information

Warm Hint

What HQEW.NET can offer here?
1. www.hqew.net/product-data provides numerous and various electronic part data-sheet and technology document here., if it can't be shown, Please feel free to ask us for it.
2. www.hqew.net/news provides the latest information of the semiconductor industry or the electronics industry for you.
3. www.hqew.net provides verified suppliers and numerous electronic components for your demand and business.
Any questions you can contact us by email cs@hqew.net.
related datasheet
Browse Alphabetically: A B C D E F G H I J K L M N O P Q R S T U V W X Y Z 0 1 2 3 4 5 6 7 8 9
Contact Us

+86-755-83536845

One to One Customer Service

17190417227