54AC646LMQB-RH Datasheet

Octal Bus Transceiver And Register With Tri-state Outputs


Features, Applications

The 'AC646 consist of registered bus transceiver circuits, with outputs, D-type flip-flops and control circuitry providing multiplexed transmission of data directly from the input bus or from the internal storage registers. Data on the or B bus will be loaded into the respective registers on the LOW-to-HIGH transition of the appropriate clock pin (CPAB or CPBA). The four fundamental data handling functions available are illustrated in Figures Multiplexed real-time and stored data transfers TRI-STATE outputs 300 mil slim dual-in-line package Outputs source/sink mA 'ACT646 has TTL compatible inputs Standard Microcircuit Drawing (SMD) 'AC646: 5962-89682


Description Data Register A Inputs Data Register A Outputs Data Register B Inputs Data Register B Outputs Clock Pulse Inputs Transmit/Receive Inputs Output Enable Input Direction Control Input

TRI-STATE is a registered trademark of National Semiconductor Corporation. FACT is a registered trademark of Fairchild Semiconductor Corporation.

FIGURE 1. Real Time Transfer B-Bus to A-Bus
Data I/O (Note 1) SAB SBA Output Input Output Input A0�A7 B0�B7 Isolation

Clock An Data into A Register Clock Bn Data into B Register to Bn Real Time (Transparent Mode) Clock An Data into A Register A Register to Bn (Stored Mode) Clock An Data into A Register and Output to An Real Time (Transparent Mode) Clock Bn Data into B Register B Register to An (Stored Mode) Clock Bn Data into B Register and Output to An

H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial

Note 1: The data output functions may be enabled or disabled by various signals at the G and DIR inputs. Data input functions are always enabled; i.e., data at the bus pins will be stored on every LOW-to-HIGH transition of the appropriate clock inputs.



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