Homedatasheet54F182FM-MLS

54F182FM-MLS Datasheet

Military/Aerospace->FAST
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Description

Features, Applications

The is a high-speed carry lookahead generator It is generally used with the 'F381 4-bit arithmetic logic units to provide high-speed lookahead over word lengths of more than four bits

Features

Provides lookahead carries across a group of four ALUs Multi-level lookahead high-speed arithmetic operation over long word lengths Guaranteed 4000V minimum ESD protection

Package Description (0 300 Wide) Molded Dual-In-Line 16-Lead Ceramic Dual-In-Line (0 300 Wide) Molded Small Outline EIAJ 16-Lead Cerpack 20-Lead Ceramic Leadless Chip Carrier Type C

Note 1 Devices also available in 13 reel Use suffix e SCX and SJX Note 2 Military grade device with environmental and burn-in processing Use suffix e DMQB FMQB and LMQB

TRI-STATE is a registered trademark of National Semiconductor Corporation C1995 National Semiconductor Corporation 9492 RRD-B30M105 Printed S A

Carry Input Carry Generate Inputs (Active LOW) Carry Generate Input (Active LOW) Carry Generate Input (Active LOW) Carry Propagate Inputs (Active LOW) Carry Propagate Input (Active LOW) Carry Propagate Input (Active LOW) Carry Outputs Carry Generate Output (Active LOW) Carry Propagate Output (Active LOW)

The 'F182 carry lookahead generator accepts up to four pairs of Active LOW Carry Propagate � P3) and Carry Generate � G3) signals and an Active HIGH Carry input (Cn) and provides anticipated Active HIGH carries (Cn a z) across four groups of binary adders The 'F182 also has Active LOW Carry Propagate (P) and Carry Generate (G) outputs which may be used for further levels of lookahead The logic equations provided at the outputs are y Cn

Also the 'F182 can be used with binary ALUs in an active LOW or active HIGH input operand mode The connections (Figure 1) to and from the ALU to the carry lookahead generator are identical in both cases Carries are rippled between lookahead blocks The critical speed path follows the circled numbers There are several possible arrangements for the carry interconnects but all achieve about the same speed A 28-bit ALU is formed by dropping the last or 'F381

FIGURE 1 32-Bit ALU with Rippled Carry between 16-Bit Lookahead ALUs
H e HIGH Voltage Level L e LOW Voltage Level X e Immaterial

Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays


Features

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