Homedatasheet5962-8960101MSA

5962-8960101MSA Datasheet

Military/Aerospace->FACT AC
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Description

Features, Applications
54AC574 54ACT574 Octal D-Type Flip-Flop with TRI-STATE Outputs
54AC574 54ACT574 Octal D-Type Flip-Flop with TRI-STATE � Outputs

The is a high-speed, low power octal flip-flop with a buffered common Clock (CP) and a buffered common Output Enable (OE). The information presented to the D inputs is stored in the flip-flops on the LOW-to-HIGH Clock (CP) transition. The 'AC/'ACT574 is functionally identical to the 'AC/'ACT374 except for the pinouts.

Features

n ICC and IOZ reduced 50% n Inputs and outputs on opposite sides of package allowing easy interface with microprocessors n Useful as input or output port for microprocessors n Functionally identical 'AC/'ACT374 n TRI-STATE outputs for bus-oriented applications n Outputs source/sink n 'ACT574 has TTL-compatible inputs n Standard Microcircuit Drawing (SMD) 'ACT574: 5962-89601

Description Clock Pulse Input TRI-STATE Output Enable Input TRI-STATE Outputs

TRI-STATE is a registered trademark of National Semiconductor Corporation. FACTTM is a trademark of Fairchild Semiconductor Corporation.

The 'AC/'ACT574 consists of eight edge-triggered flip-flops with individual D-type inputs and TRI-STATE true outputs. The buffered clock and buffered Output Enable are common to all flip-flops. The eight flip-flops will store the state of their individual D inputs that meet the setup and hold time requirements on the LOW-to-HIGH Clock (CP) transition. With the Output Enable (OE) LOW, the contents of the eight flip-flops are available at the outputs. When OE is HIGH, the outputs go to the high impedance state. Operation of the OE input does not affect the state of the flip-flops.

Inputs OE CP Internal Outputs ON NC Hold Load Data Available Data Available No Change in Data No Change in Data Function

H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance N = LOW-to-HIGH Transition = No Change

Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.


Features

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