Homedatasheet5962-9685501Q2A

5962-9685501Q2A Datasheet

D-Type (3-State) Latches
Share:
Manufacturer

Description

Features, Applications
SN54AHCT573, SN74AHCT573 OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS

Inputs Are TTL-Voltage Compatible Latch-Up Performance Exceeds 250 mA Per JESD 17 ESD Protection Exceeds JESD � 2000-V Human-Body Model � 200-V Machine Model � 1000-V Charged-Device Model (C101)

The 'AHCT573 devices are octal transparent D-type latches. When the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is low, the Q outputs are latched at the logic levels of the D inputs. A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

OE does not affect the internal operations of the latches. Old data can be retained or new data can be entered while the outputs are in the high-impedance state. ORDERING INFORMATION

TA PDIP � N SOIC to 85�C SOP � NS SSOP � DB TSSOP � PW TVSOP � DGV CDIP to 125�C CFP � W LCCC � FK PACKAGE Tube Tape and reel Tape and reel Tape and reel Tube Tape and reel Tape and reel Tube ORDERABLE PART NUMBER SNJ54AHCT573W SNJ54AHCT573FK TOP-SIDE MARKING SNJ54AHCT573W SNJ54AHCT573FK

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters.

PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

FUNCTION TABLE (each latch) INPUTS OE LE OUTPUT Q0 Z
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

Supply voltage range, VCC. 7 V Input voltage range, VI (see Note 7 V Output voltage range, VO (see Note V to VCC 0.5 V Input clamp current, IIK (VI �20 mA Output clamp current, IOK (VO VO > VCC). �20 mA Continuous output current, IO (VO 0 to VCC). �25 mA Continuous current through VCC or GND. �75 mA Package thermal impedance, JA (see Note 2): DB package. 70�C/W DGV package. 92�C/W DW package. 58�C/W N package. 69�C/W NS package. 60�C/W PW package. 83�C/W Storage temperature range, Tstg. to 150�C

Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. The package thermal impedance is calculated in accordance with JESD 51-7.

SN54AHCT573 MIN VCC VIH VIL VI VO IOH IOL t/v Supply voltage High-level input voltage Low-level input voltage Input voltage Output voltage High-level output current Low-level output current Input transition rise or fall rate VCC MAX 5.5 SN74AHCT573 MIN VCC 8 20 MAX 5.5 UNIT mA ns/V

TA Operating free-air temperature �C NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)

PARAMETER VOH VOL II IOZ ICC Ci TEST CONDITIONS IOH �50 mA IOH �8 mA IOL 50 mA IOL V or GND VO = VCC or GND V or GND, = 0 One input 3.4 V, Other inputs at VCC or GND VI = VCC or GND VO = VCC or GND VCC 5V 2.5 MIN = 25�C TYP MAX 4.5 SN54AHCT573 MIN MAX SN74AHCT573 MIN MAX UNIT V

* On products compliant to MIL-PRF-38535, this parameter is not production tested at VCC 0 V. This is the increase in supply current for each input at one of the specified TTL voltage levels, rather than V or VCC.

timing requirements over recommended operating free-air temperature range, Vcc 0.5 V (unless otherwise noted) (see Figure 1)

= 25�C MIN MAX tw tsu th Pulse duration, LE high Setup time, data before LE Hold time, data after 1.5 SN54AHCT573 MIN 3.5 1.5 MAX SN74AHCT573 MIN 3.5 1.5 MAX UNIT ns


Features

Parameters

Download DataSheet PDF View and Download


Manufacturer information

Warm Hint

What HQEW.NET can offer here?
1. www.hqew.net/product-data provides numerous and various electronic part data-sheet and technology document here., if it can't be shown, Please feel free to ask us for it.
2. www.hqew.net/news provides the latest information of the semiconductor industry or the electronics industry for you.
3. www.hqew.net provides verified suppliers and numerous electronic components for your demand and business.
Any questions you can contact us by email cs@hqew.net.
related datasheet
Browse Alphabetically: A B C D E F G H I J K L M N O P Q R S T U V W X Y Z 0 1 2 3 4 5 6 7 8 9
Contact Us

+86-755-83536845

One to One Customer Service

17190417227