Homedatasheet5962-9855002QXA

5962-9855002QXA Datasheet

Single Integer PLLs
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Description

Features, Applications

The LMX2315/2320/2325's are high performance frequency synthesizers with integrated prescalers designed for RF operation to 2.5 GHz. They are fabricated using National's ABiC IV BiCMOS process. a 128/129 divide ratio can be selected for the LMX2315 and LMX2320 RF synthesizer at input frequencies to 1.2 GHz and 2.0 GHz, while 32/33 and 64/65 divide ratios are available in the 2.5 GHz LMX2325. Using a proprietary digital phase locked loop technique, the LMX2315/ 2320/2325's linear phase detector characteristics can generate very stable, low noise signals for controlling a local oscillator. Serial data is transferred into the LMX2320 and the LMX2325 via a three line MICROWIRETM interface (Data, Enable, Clock). Supply voltage can range from to 5.5V. The LMX2315, LMX2320 and the LMX2325 feature very low current consumption, typically 6 mA, 10 mA and 11 mA respectively. The LMX2315, LMX2320 and the LMX2325 are available in a TSSOP 20-pin surface mount plastic package.

Features

RF operation to 2.5 GHz to 5.5V operation Low current consumption Dual modulus prescaler: 128/129 n Internal balanced, low leakage charge pump n Power down feature for sleep mode: ICC 30 �A (typ) at VCC 3V n Small-outline, plastic, surface mount TSSOP, 0.173" wide

Applications

n Cellular telephone systems (GSM, (RCR-27) n Portable wireless communications (DECT, PHS) n CATV n Other wireless communication systems

TRI-STATE is a registered trademark of National Semiconductor Corporation. MICROWIRETM and PLLatinumTM are trademarks of National Semiconductor Corporation.

20-Lead (0.173" Wide) Thin Shrink Small Outline Package (TM) Order Number or LMX2320TMX See NS Package Number MTC20

Pin No. 1 Pin Name OSCIN I/O I Description Oscillator input. A CMOS inverting gate input intended for connection to a crystal resonator for operation as an oscillator. The input has a VCC/2 input threshold and can be driven from an external CMOS or TTL logic gate. May also be used as a buffer for an externally provided reference oscillator. Oscillator output. Power supply for charge pump. Must be VCC. Power supply voltage input. Input may range from to 5.5V. Bypass capacitors should be placed as close as possible to this pin and be connected directly to the ground plane. Internal charge pump output. For connection to a loop filter for driving the input of an external VCO. Ground. Lock detect. Output provided to indicate when the VCO frequency is in "lock". When the loop is locked, the pin's output is HIGH with narrow low pulses. Prescaler input. Small signal input from the VCO. High impedance CMOS Clock input. Data is clocked in on the rising edge, into the various counters and registers. Binary serial data input. Data entered MSB first. LSB is control bit. High impedance CMOS input. Load enable input (with internal pull-up resistor). When LE transitions HIGH, data stored in the shift registers is loaded into the appropriate latch (control bit dependent). Clock must be low when LE toggles high or low. See Serial Data Input Timing Diagram. Phase control select (with internal pull-up resistor). When FC is LOW, the polarity of the phase comparator and charge pump combination is reversed. Analog switch output. When LE is HIGH, the analog switch is ON, routing the internal charge pump output through BISW (as well as through Do). Monitor pin of phase comparator input. CMOS output. Output for external charge pump. is an open drain N-channel transistor and requires a pull-up resistor. Power Down (with internal pull-up resistor). PWDN = HIGH for normal operation. PWDN = LOW for power saving. Power down function is gated by the return of the charge pump to a TRI-STATE � condition. NC O Output for external charge pump. is a CMOS logic output. No connect.

Note 1: The prescalar for the LMX2315 and LMX2320 is either or 128/129, while the prescalar for the or 64/65. Note 2: The power down function is gated by the charge pump to prevent unwanted frequency jumps. Once the power down pin is brought low the part will go into power down mode when the charge pump reaches a TRI-STATE condition.


Features

Parameters

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