HomedatasheetDDU18-8

DDU18-8 Datasheet

8-tap, Ecl-interfaced Fixed Delay Line Series
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Description

Features, Applications

FEATURES

Eight equally spaced outputs Fits in 400 mil 24-pin DIP socket Input & outputs fully 100K-ECL interfaced & buffered

The DDU18-series device a 8-tap digitally buffered delay line. The signal IN Signal Input input (IN) is reproduced at the outputs (T1-T8), shifted in time an T1-T8 Tap Outputs amount determined by the device dash number (See Table). For dash VEE -5 Volts numbers less than 16, the total delay of the line is measured from to T8. GND Ground The nominal tap-to-tap delay increment is given by one-seventh of the total delay, and the inherent delay from T1 is nominally 2.0ns. For dash numbers greater than or equal to 16, the total delay of the line is measured from to T8. The nominal tap-to-tap delay increment is given by one-eighth of this number.

Minimum input pulse width: 40% of total delay Output rise time: 2ns typical Supply voltage: � 5% Power dissipation: 500mw typical (no load) Operating temperature: 85� C Temp. coefficient of total delay: 100 PPM/�C

* Total delay is referenced to first tap output Input to first tap � 1ns NOTE: Any dash number between 4 and 200 not shown is also available.

The DDU18 tolerances are guaranteed for input pulse widths and periods greater than those specified in the test conditions. Although the device will function properly for pulse widths as small 40% of the total delay and periods as small 80% of the total delay (for a symmetric input), the delays may deviate from their values at low frequency. However, for a given input condition, the deviation will be repeatable from pulse to pulse. Contact technical support at Data Delay Devices if your application requires device testing at a specific input condition.

The DDU18 relies on a stable power supply to produce repeatable delays within the stated tolerances. A 0.1uf capacitor from VEE to GND, located as close as possible to the VEE pin, is recommended. A wide VEE trace and a clean ground plane should be used.

PARAMETER DC Supply Voltage Input Pin Voltage Storage Temperature Lead Temperature SYMBOL VEE VIN TSTRG TLEAD MIN -7.0 VEE 0.3 -55 MAX UNITS NOTES

to 85C) PARAMETER High Level Output Voltage Low Level Output Voltage High Level Input Voltage Low Level Input Voltage High Level Input Current Low Level Input Current SYMBOL VOH VOL VIH VIL IIH IIL MIN TYP MAX UNITS �A NOTES VIH to -2V VIL = MIN, to -2V



Features

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