Improved Low-Power, CMOS Analog Switches with Latches
Maxim's redesigned DG421/DG423/DG425 monolithic analog switches now feature guaranteed on-resistance matching (3 max) between switches and on-resistance flatness over the signal range (4 max). These low onresistance switches (20 typ) conduct equally well in both directions. They guarantee a low charge injection of 15pC maximum and an ESD tolerance of 2000V minimum per Method 3015.7. Off leakage current over temperature has also been reduced (less than at +85�C). The DG421/DG423/DG425 are precision, dual CMOS switches with latchable logic inputs that simplify interfacing with microprocessors (�Ps). The single-pole/singlethrow DG421 and double-pole/single-throw DG425 are normally open dual switches. The dual, singlepole/double-throw DG423 has two normally open and two normally closed switches. Fast switching times (175ns for t ON and 145ns for t OFF ) and low power consumption (35�W max) make these parts ideal for battery-powered applications requiring �P-compatible switches. Operation is from a single to +30V supply, or bipolar to �20V supplies. Fabricated with the same 44V silicon-gate process, these switches have rail-to-rail signal handling capabilities.
o Plug-In Upgrades for Industry-Standard DG421/DG423/DG425 o Improved r(DS)ON Match Between Channels (3 max) o Guaranteed rFLAT(ON) Over Signal Range (4 max) o Improved Charge Injection (15pC max) o Improved Off Leakage Current Over Temperature +85�C) o Withstands Electrostatic Discharge (2000V min) per Method 3015.7
o Low rDS(ON) (35 max) o Single-Supply Operation to +30V Bipolar-Supply Operation �20V o Low Power Consumption (35�W max) o Rail-to-Rail Signal Handling Capability o TTL/CMOS-Logic Compatible
PART DG421DK DG421AK TEMP. RANGE to +125�C PIN-PACKAGE 16 Plastic DIP 16 SO Dice* 16 Plastic DIP SO 16 CERDIP 16 CERDIP**
Sample-and-Hold Circuits Fax Machines Battery-Operated Systems Guidance and Control Systems Audio Signal Routing Modems Test Equipment PBX, PABX Military Radios Communication Systems
Ordering Information continued at end of data sheet. * Contact factory for dice specifications. **Contact factory for availability and processing to MIL-STD-883B.LOGIC "O" 0.8V LOGIC "1" 2.4V SWITCHES SHOWN FOR LOGIC "1" INPUT
Functional Diagrams/Truth Tables continued at end of data sheet.
DIP N.C. = No Internal Connection Pin Configurations continued at end of data sheet. 1
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Improved Low-Power, CMOS Analog Switches with Latches DG421/DG423/DG425
Voltage Referenced to VV+. 44V GND. 25V VL. (GND 0.3V) to (V+ + 0.3V) Digital Inputs, VS, VD (Note 1). (V- 2V) to (V+ + 2V) Current (any terminal, except or D).................................30mA Continuous Current, or D.................................................20mA Peak Current, or D (pulsed 1ms, 10% duty cycle max)...100mA Continuous Power Dissipation (TA +70�C) 16-Pin Plastic DIP (derate 10.53mW/�C above +70�C).842mW 20-Pin PLCC (derate 10.00mW/�C above 800mW 16-Pin CERDIP (derate 10.00mW/�C above +70�C). 800mW Operating Temperature Ranges to +125�C Storage Temperature Ranges to +150�C Lead Temperature (soldering, 10sec). +300�C
Note 1: Signals or IN exceeding or V- are clamped by internal diodes. Limit forward current to maximum current ratings.
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
(V+ = +5V, GND = 0V, VINH = +2.4V, VINL TA = TMIN to TMAX, unless otherwise noted.) PARAMETER SWITCH Analog Signal Range Drain-Source On-Resistance VANALOG (Note TA = TMIN to TMAX TA = TMIN to TMAX TA = TMIN to TMAX TA = TMIN to TMAX TA = TMIN to TMAX TA = TMIN to TMAX 20 V SYMBOL CONDITIONS DG42_C, DG42_D MIN TYP MAX (Note 2) MIN DG42_A TYP MAX (Note 2) UNITS
Source-Off Leakage Current (Note 5) Drain-Off Leakage Current (Note 5) Drain-On Leakage Current (Note 5) 2
(V+ = +5V, GND = 0V, VINH = +2.4V, VINL TA = TMIN to TMAX, unless otherwise noted.) PARAMETER INPUT Input Current with Input Voltage High Input Current with Input Voltage Low SUPPLY Power Supply Range Positive Supply Current SYMBOL CONDITIONS MIN TYP MAX (Note 1.0 �A UNITS
= 2.4V, all others = 0.8V, all others = 2.4V (Note 3) All channels on or off, = -16.5V, VIN or 5V All channels on or off, = -16.5V, VIN or 5V All channels on or off, = -16.5V, VIN or 5V All channels on or off, = -16.5V, VIN or 5VTA = TMIN to TMAX TA = TMIN to TMAX TA = TMIN to TMAX TA = TMIN to TMAX TA = TMIN to TMAX = +25�C
Ground Current DYNAMIC Turn-On Time Turn-Off Time
Figure 2 Figure = 35pF, Figure 3 DG423, Figure = 0, Figure = 1MHz, Figure = 1MHz, Figure 7
Break-Before-Make Interval (Note 3) Charge Injection (Note 3) Off-Isolation Rejection Ratio (Note 6) Crosstalk (Note 7) Drain-Off Capacitance Source-Off Capacitance Drain-On Capacitance Source-On Capacitance
Note 2: Typical values are for design aid only, are not guaranteed, and are not subject to production testing. The algebraic convention, where the most negative value is a minimum and the most positive value a maximum, is used in this data sheet. Note 3: Guaranteed by design. Note 4: On-resistance match between channels and flatness are guaranteed only with bipolar-supply operation. Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured at the extremes of the specified analog signal range. Note 5: Leakage parameters IS(OFF), ID(OFF), and ID(ON) are 100% tested at the maximum rated hot temperature and guaranteed by correlation at +25�C. Note 6: Off-Isolation Rejection Ratio = 20log (VD/VS), VD = output, VS = input to off switch. Note 7: Between any two switches.