HomedatasheetLP2997MR/NOPB

LP2997MR/NOPB Datasheet

PMIC - Power Management - Specialized
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Description

The LP2997MR/NOPB linear regulator is designed to meet the JEDEC SSTL-18 specifications for termination of DDR-II memory. The device contains a high-speed operational amplifier to provide excellent response to load transients. The output stage prevents shoot through while delivering 500mA continuous current and transient peaks up to 900mA in the application as required for DDR-II SDRAM termination. The LP2997MR/NOPB also incorporates a VSENSE pin to provide superior load regulation and a VREF output as a reference for the chipset and DIMMs.An additional feature found on the LP2997MR/NOPB is an active low shutdown (SD) pin that provides Suspend To RAM (STR) functionality. When SD is pulled low the VTT output will tri-state providing a high impedance output, but, VREF will remain active. A power savings advantage can be obtained in this mode through lower quiescent current. LP2997MR/NOPB Features • Source and sink current• Low output voltage offset• No external resistors required• Linear topology• Suspend to Ram (STR) functionality• Low external component count• Thermal Shutdown• Available in SO-8, PSOP-8 packages LP2997MR/NOPB Applications • DDR-II Termination Voltage• SSTL-18 Termination
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Parameters

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Manufacturer information

SILICON LABORATORIES
Warm Hint

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