HomedatasheetQL4036-0PB256M

QL4036-0PB256M Datasheet

36,000 usable PLD gate QuickRAM ESP combining performance, density and embedded RAM.
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ARCHITECTURE OVERVIEW
The QuickRAM family of ESPs (Embedded Standard Products) offers FPGA logic in combination with Dual Port SRAM modules. The QL4036 is a 36,000 usable PLD gate member of the QuickRAM family of ESPs. QuickRAM ESPs are fabricated on a 0.35mm four-layer metal process using QuickLogic’s patented ViaLinkTM technology to provide a unique combination of high  performance, high density, low cost, and extreme ease-of-use.
The QL4036 contains 672 logic cells and 14 dual port RAM modules(see Figure 1). Each RAM module has 1,152 RAM bits, for a total of 16,128 bits. RAM Modules are Dual Port (one read port, one write port) and can be configured into one of four modes: 64(deep) x18 (wide), 128x9, 256x4, or 512x2 (see Figure 2). With a maximum of 204 I/Os, the QL4036 is available in 144-pin TQFP, 208-pin PQFP and 256-pin PBGA packages.

DEVICE HIGHLIGHTS
High Performance & High Density
■36,000 Usable PLD Gates with 204 I/Os
■300 MHz 16-bit Counters, 400 MHz Datapaths, 160+ MHz FIFOs
■0.35µm four-layer metal non-volatile CMOS process for smallest die sizes

High Speed Embedded SRAM
■14 dual-port RAM modules, organized in user-config urable 1,152 bit blocks
■5ns access times, each port independently accessible
■Fast and effecient for FIFO, RAM, and ROM functions

Easy to Use / Fast Development Cycles
■100% routable with 100% utilization and complete pin-out stability
■Variable-grain logic cells provide high performance and 100% utilization
■Comprehensive design tools include high quality Verilog/VHDL synthesis

Advanced I/O Capabilities
■Interfaces with both 3.3V and 5.0V devices
■PCI compliant with 3.3V and 5.0V busses for -1/-2/-3/-4 speed grades
■Full JTAG boundary scan
■Registered I/O cells with individually controlled clocks and output enables

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Manufacturer information

QUICKLOGIC CORPORATION
Warm Hint

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