CA3054M96 Datasheet

Dual Independent Differential Amp For Low Power Applications From DC to 120MHz


Features, Applications

Dual Independent Differential Amp for Low Power Applications from to 120MHz

The CA3054 consists of two independent differential amplifiers with associated constant current transistors on a common monolithic substrate. The six NPN transistors which comprise the amplifiers are general purpose devices which exhibit low 1/f noise and a value fT in excess of 300MHz. These feature make the CA3054 useful from to 120MHz. Bias and load resistors have been omitted to provide maximum application flexibility. The monolithic construction of the CA3054 provides close electrical and thermal matching of the amplifiers. This feature makes these devices particularly useful in dual channel applications where matched performance of the two channels is required.


Two Differential Amplifiers on a Common Substrate Independently Accessible Inputs and Outputs Maximum Input Offset Voltage. �5mV Temperature Range. to 85oC


Dual Sense Amplifiers Dual Schmitt Triggers Multifunction Combinations - RF/Mixer/Oscillator; Converter/IF IF Amplifiers (Differential and/or Cascode) Product Detectors Doubly Balanced Modulators and Demodulators Balanced Quadrature Detectors

PART NUMBER (BRAND) CA3054M96 (3054) TEMP. RANGE (oC) to 85 PACKAGE 14 Ld PDIP 14 Ld SOIC Tape and Reel PKG. NO. E14.3 M14.15

Cascade Limiters Synchronous Detectors Pairs of Balanced Mixers Synthesizer Mixers Balanced (Push-Pull) Cascode Amplifiers

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 321-724-7143 | Copyright � Intersil Corporation 1999

Collector-to-Emitter Voltage, VCEO. 15V Collector-to-Base Voltage, VCBO. 20V Collector-to-Substrate Voltage, VCIO (Note 1). 20V Emitter-to-Base Voltage, VEBO. 5V Collector Current, IC. 50mA

Thermal Resistance (Typical, Note 2) JA (oC/W) PDIP Package. 130 SOIC Package. 140 Maximum Junction Temperature (Die).175oC Maximum Junction Temperature (Plastic Package).150oC Maximum Storage Temperature Range. to 150oC Maximum Lead Temperature (Soldering 10s). 300oC (SOIC - Lead Tips Only) Maximum Power Dissipation (Any One Transistor). 300mW

CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTES: 1. The collector of each transistor of the CA3054 is isolated from the substrate by an integral diode. The substrate must be connected to a voltage which is more negative than any collector voltage in order to maintain isolation between transistors and provide for normal transistor action. The substrate should be maintained at signal (AC) ground by means of a suitable grounding capacitor, to avoid undesired coupling between transistors. JA is measured with the component mounted on an evaluation PC board in free air.

The following chart gives the range of voltages which can be applied to the terminals listed vertically with respect to the terminals listed horizontally. For example, the voltage range of the vertical Terminal 2 with respect to Terminal to -5V. (NOTE 4) TERM NO.

NOTES: 3. Voltages are not normally applied between these terminals. Voltages appearing between these terminals will be safe if the specified limits between all other terminals are not exceeded. 4. Terminal No. CA3054 is not used.

PARAMETER DC CHARACTERISTICS SYMBOL TEST CONDITIONS MIN TYP MAX UNIT For Each Differential Amplifier VIO IIO I C(Q5) --------------------------------I V IO ---------------T VCB = 2mA VCB = 2mA VCB = 2mA VCB �A -

Input Offset Voltage (Figure 8) Input Offset Current (Figure 9) Input Bias Current (Figure 5) Quiescent Operating Current Ratio (Figure 5) Temperature Coefficient Magnitude of Input Offset Voltage (Figure 7)

PARAMETER FOR EACH TRANSISTOR DC Forward Base-to-Emitter Voltage (Figure 8) VBE VCB = 10mA Temperature Coefficient of Base-to-Emitter Voltage (Figure 6) Collector Cutoff Current (Figure 4) Collector-to-Emitter Breakdown Voltage Collector-to-Base Breakdown Voltage Collector-to-Substrate Breakdown Voltage Emitter-to-Base Breakdown Voltage DYNAMIC CHARACTERISTICS Common Mode Rejection Ratio for each Amplifier (Figures 1, 10) AGC Range, One Stage (Figures 2, 11) Voltage Gain, Single Stage Double-Ended Output (Figures 2, 11) AGC Range, Two Stage (Figures 3, 12) Voltage Gain, Two Stage Double-Ended Output (Figures 3, 12) Low Frequency, Small Signal Equivalent Circuit Characteristics (For Single Transistor) Forward Current Transfer Ratio (Figure 13) Short Circuit Input Impedance (Figure 13) Open Circuit Output Impedance (Figure 13) Open Circuit Reverse Voltage Transfer Ratio (Figure 13) 1/f Noise Figure for Single Transistor Gain Bandwidth Product for Single Transistor (Figure 14) Admittance Characteristics; Differential Circuit Configuration (For Each Amplifier) Forward Transfer Admittance (Figure 15) Input Admittance (Figure 16) Output Admittance (Figure 17) Reverse Transfer Admittance (Figure Y22 Y12 VCB = 1MHz Each Collector IC 1.25mA VCB = 1MHz Each Collector IC 1.25mA VCB = 1MHz Each Collector IC 1.25mA VCB = 1MHz Each Collector j0 mS hFE hIE hOE hRE = 1kHz, VCE = 1kHz, VCE = 1kHz, VCE = 1kHz, VCE = 1kHz, VCE = 3V VCE �S dB MHz CMRR AGC A AGC A VCC = 12V, VEE = 1kHz VCC = 12V, VEE = 1kHz VCC = 12V, VEE = 1kHz VCC = 12V, VEE = 1kHz VCC = 12V, VEE V BE --------------T ICBO V(BR)CEO V(BR)CBO V(BR)CIO V(BR)EBO VCB = 1mA �V/oC SYMBOL TEST CONDITIONS MIN TYP MAX UNIT



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