HomedatasheetCD4015BKNSR

CD4015BKNSR Datasheet

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Description

Features, Applications

CMOS Dual 4-Stage Static Shift Register With Serial Input/Parallel Output
CLOCK Q1A 5 RESET A 6 DATA A 7 VSS 8 16 VDD 15 DATA B 14 RESET Q4A 9 CLOCK A
Features

High-Voltage Type (20V Rating) Medium Speed Operation 12MHz (typ.) Clock Rate at VDD - VSS = 10V Fully Static Operation 8 Master-Slave Flip-Flops Plus Input and Output Buffering 100% Tested For Quiescent Current 5V, 10V and 15V Parametric Ratings Standardized Symmetrical Output Characteristics Maximum Input Current at 18V Over Full Package-Temperature Range; at 18V and 25oC Noise Margin (Full Package-Temperature Range) 1V at VDD 2V at VDD 2.5V at VDD = 15V Meets All Requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of `B' Series CMOS Devices"

VDD 16 DATA A CLOCK A RESET A STAGE DATA 1 14 RESET B 4 STAGE Q4B 8 VSS Q4A Q1B
Applications

Serial-Input/Parallel-Output Data Queueing Serial to Parallel Data Conversion General-Purpose Register

Description

CD4015BMS consists of two identical, independent, 4-stage serial-input/parallel output registers. Each register has independent CLOCK and RESET inputs as well as a single serial DATA input. "Q" outputs are available from each of the four stages on both registers. All register stages are D type, master-slave flip-flops. The logic level present at the DATA input is transferred into the first register stage and shifted over one stage at each positive-going clock transition. Resetting of all stages is accomplished by a high level on the reset line. Register expansion to 8 stages using one CD4015BMS package, or to more than 8 stages using additional CD4015BMS's is possible. The CD4015BMS is supplied in these 16 lead outline packages: Braze Seal DIP Frit Seal DIP Ceramic Flatpack H1F H6W

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 321-724-7143 | Copyright � Intersil Corporation 1999

DC Supply Voltage Range, (VDD). to +20V (Voltage Referenced to VSS Terminals) Input Voltage Range, All Inputs.-0.5V to VDD +0.5V DC Input Current, Any One Input.�10mA Operating Temperature Range. to +125oC Package Types K, H Storage Temperature Range (TSTG). to +150oC Lead Temperature (During Soldering). +265oC At Distance � 1/32 Inch � 0.79mm) from case for 10s Maximum

Thermal Resistance. ja jc Ceramic DIP and FRIT Package. 80oC/W 20oC/W Flatpack Package. 20oC/W o Maximum Package Power Dissipation (PD) +125 C For to +100oC (Package Type D, F, K). 500mW For to +125oC (Package Type D, F, K). Derate Linearity to 200mW Device Dissipation per Output Transistor. 100mW For TA = Full Package Temperature Range (All Package Types) Junction Temperature. +175oC

TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS GROUP A SUBGROUPS 1 2 VDD = 18V, VIN = VDD or GND Input Leakage Current IIL VIN = VDD or GND VDD = 18V Input Leakage Current IIH VIN = VDD or GND VDD = 18V Output Voltage Output Voltage Output Current (Sink) Output Current (Sink) Output Current (Sink) Output Current (Source) Output Current (Source) Output Current (Source) Output Current (Source) N Threshold Voltage P Threshold Voltage Functional IOH10 IOH15 VNTH VPTH F VDD 15V, No Load VDD 15V, No Load (Note 3) VDD = 5V, VOUT = 0.4V VDD = 10V, VOUT = 0.5V VDD = 15V, VOUT = 1.5V VDD = 5V, VOUT = 4.6V VDD = 5V, VOUT = 2.5V VDD = 10V, VOUT = 9.5V VDD = 15V, VOUT = 13.5V VDD = 10V, ISS = -10�A VSS = 0V, IDD = 10�A VDD = 2.8V, VIN = VDD or GND VDD = 20V, VIN = VDD or GND VDD = 18V, VIN = VDD or GND VDD = 3V, VIN = VDD or GND Input Voltage Low (Note 2) Input Voltage High (Note 2) Input Voltage Low (Note 2) Input Voltage High (Note 2) VIL VIH VIL VIH VDD = 5V, VOH > 4.5V, VOL < 0.5V VDD = 5V, VOH > 4.5V, VOL < 0.5V VDD = 15V, VOH > 13.5V, VOL < 1.5V VDD = 15V, VOH > 13.5V, VOL 8A 8B LIMITS TEMPERATURE +25

NOTES: 1. All voltages referenced to device GND, 100% testing being implemented. 2. Go/No Go test with limits applied to inputs

3. For accuracy, voltage is measured differentially to VDD. Limit is 0.050V max.

TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS GROUP A SUBGROUPS TEMPERATURE 10, 11 VDD = 5V, VIN = VDD or GND 10, 11 TTHL TTLH FCL VDD = 5V, VIN = VDD or GND 10, 11 VDD = 5V, VIN = VDD or GND +125oC, -55oC LIMITS MIN 3 3/1.35 MAX UNITS ns MHz

PARAMETER Propagation Delay Clock To Q Propagation Delay Reset To Q Transition Time

= 200K, Input TR, 2. -55oC and +125oC limits guaranteed, 100% testing being implemented. TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS LIMITS PARAMETER Supply Current SYMBOL IDD CONDITIONS VDD = 5V, VIN = VDD or GND NOTES 1, 2 TEMPERATURE +25oC +125oC VDD = 10V, VIN = VDD or GND C +125oC VDD = 15V, VIN = VDD or GND -55oC, +25oC

+125 Output Voltage Output Voltage Output Voltage Output Voltage Output Current (Sink) VOL VOH IOL5 VDD 5V, No Load VDD 10V, No Load VDD 5V, No Load VDD 10V, No Load VDD = 5V, VOUT = 0.4V



Features

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