HomedatasheetCD4017BMS

CD4017BMS Datasheet

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Description

Features, Applications

CD4017BMS - Decade Counter with 10 Decoded Outputs CD4022BMS - Octal Counter with 8 Decoded Outputs CD4017BMS and CD4022BMS are 5-stage and 4-stage Johnson counters having 10 and 8 decoded outputs, respectively. Inputs include a CLOCK, a RESET, and a CLOCK INHIBIT signal. Schmitt trigger action in the CLOCK input circuit provides pulse shaping that allows unlimited clock input pulse rise and fall times. These counters are advanced one count at the positive clock signal transition if the CLOCK INHIBIT signal is low. Counter advancement via the clock line is inhibited when the CLOCK INHIBIT signal is high. A high RESET signal clears the counter to its zero count. Use of the Johnson counter configuration permits high speed operation, 2-input decode gating and spike-free decoded outputs. Anti-lock gating is provided, thus assuring proper counter sequence. The decoded output are normally low and go high only at their respective decoded time slot. Each decoded output remains high for one full clock cycle. A CARRYOUT signal completes one cycle every 10 clock input cycles in the CD4017BMS or every 8 clock input cycles in the CD4022BMS and is used to ripple-clock the succeeding device in a multi-device counting chain.

The CD4017BMS and CD4022BMS series types are supplied in these 16 lead outline packages
Features

High Voltage Types (20V Rating) Fully Static Operation Medium-Speed Operation 10MHz (Typ) at VDD = 10V Standardized Symmetrical Output Characteristics 100% Tested for Quiescent Current 5V, 10V and 15V Parametric Ratings Meets All Requirements of JEDEC Tentative Standard Number 13A, "Standard Specifications for Description of `B' Series CMOS Devices"

Applications

Decade Counter/Decimal Decode Display (CD4017BMS) Binary Counter/Decoder Frequency Division Counter Control/Timers Divide-by-N Counting For Further Application Information, See ICAN-6166 "COS/MOS MSI Counter and Register Design and Applications"

Braze Seal DIP Frit Seal DIP Ceramic Flatpack *CD4017B Only

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 321-724-7143 | Copyright � Intersil Corporation 1999

DC Supply Voltage Range, (VDD). to +20V (Voltage Referenced to VSS Terminals) Input Voltage Range, All Inputs. -0.5V to VDD +0.5V DC Input Current, Any One Input.�10mA Operating Temperature Range. to +125oC Package Types K, H Storage Temperature Range (TSTG). to +150oC Lead Temperature (During Soldering). +265oC At Distance � 1/32 Inch � 0.79mm) from case for 10s Maximum

Thermal Resistance. ja jc Ceramic DIP and FRIT Package. 80oC/W 20oC/W Flatpack Package. 70oC/W 20oC/W Maximum Package Power Dissipation (PD) at +125oC For to +100oC (Package Type F, K).500mW For to +125oC (Package Type D, F, K). Derate Linearity to 200mW Device Dissipation per Output Transistor.100mW For TA = Full Package Temperature Range (All Package Types) Junction Temperature.+175oC

TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS GROUP A SUBGROUPS 1 2 VDD = 18V, VIN = VDD or GND Input Leakage Current IIL VIN = VDD or GND VDD = 18V Input Leakage Current IIH VIN = VDD or GND VDD = 18V Output Voltage Output Voltage Output Current (Sink) Output Current (Sink) Output Current (Sink) Output Current (Source) Output Current (Source) Output Current (Source) Output Current (Source) N Threshold Voltage P Threshold Voltage Functional IOH10 IOH15 VNTH VPTH F VDD 15V, No Load VDD 15V, No Load (Note 3) VDD = 5V, VOUT = 0.4V VDD = 10V, VOUT = 0.5V VDD = 15V, VOUT = 1.5V VDD = 5V, VOUT = 4.6V VDD = 5V, VOUT = 2.5V VDD = 10V, VOUT = 9.5V VDD = 15V, VOUT = 13.5V VDD = 10V, ISS = -10�A VSS = 0V, IDD = 10�A VDD = 2.8V, VIN = VDD or GND VDD = 20V, VIN = VDD or GND VDD = 18V, VIN = VDD or GND VDD = 3V, VIN = VDD or GND Input Voltage Low (Note 2) Input Voltage High (Note 2) Input Voltage Low (Note 2) Input Voltage High (Note 2) VIL VIH VIL VIH VDD = 5V, VOH > 4.5V, VOL < 0.5V VDD = 5V, VOH > 4.5V, VOL < 0.5V VDD = 15V, VOH > 13.5V, VOL < 1.5V VDD = 15V, VOH > 13.5V, VOL 8A 8B LIMITS TEMPERATURE +125oC, -55oC MIN MAX UNITS mA V

NOTES: 1. All voltages referenced to device GND, 100% testing being implemented. 2. Go/No Go test with limits applied to inputs

3. For accuracy, voltage is measured differentially to VDD. Limit is 0.050V max.

TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS GROUP A SUBGROUPS 10, 11 VDD = 5V, VIN = VDD or GND 10, 11 VDD = 5V, VIN = VDD or GND 10, 11 VDD = 5V, VIN = VDD or GND 10, 11 VDD = 5V, VIN = VDD or GND 10, 11 LIMITS TEMPERATURE +125oC, -55oC MIN 2.5 1.85 MAX UNITS ns MHz

PARAMETER Propagation Delay Clock to Decode Out Propagation Delay Clock to Carry Out Propagation Delay Reset to Out Transition Time

= 200K, Input TR, 2. -55oC and +125oC limits guaranteed, 100% testing being implemented. TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS LIMITS PARAMETER Supply Current SYMBOL IDD CONDITIONS VDD = 5V, VIN = VDD or GND VDD = 10V, VIN = VDD or GND VDD = 15V, VIN = VDD or GND Output Voltage Output Voltage Output Voltage Output Voltage Output Current (Sink) Output Current (Sink) Output Current (Sink) Output Current (Source) Output Current (Source) Output Current (Source) Output Current (Source) Input Voltage Low Input Voltage High VOL VOH IOH10 IOH15 VIL VIH VDD 5V, No Load VDD 10V, No Load VDD 5V, No Load VDD 10V, No Load VDD = 5V, VOUT = 0.4V VDD = 10V, VOUT = 0.5V VDD = 15V, VOUT = 1.5V VDD = 5V, VOUT = 4.6V VDD = 5V, VOUT = 2.5V VDD = 10V, VOUT = 9.5V VDD =15V, VOUT = 13.5V VDD = 10V, VOH > 9V, VOL < 1V VDD = 10V, VOH > 9V, VOL < 1V NOTES TEMPERATURE +125oC, 55oC MIN MAX UNITS mA V


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