HomedatasheetCD4018BMS

CD4018BMS Datasheet

Synchronous Counters-> CMOS/BiCMOS->HC/HCT Family
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Description

Features, Applications

Description

CD4018BMS types consist of 5 Johnson-Counter stages, buffered Q outputs from each stage, and counter preset control gating. CLOCK, RESET, DATA, PRESET ENABLE, and 5 individual JAM inputs are provided. Divide or 2 counter configurations can be implemented by feeding the Q2, Q1 signals, respectively, back to the DATA input. or 3 counter configurations can be implemented by the use CD4011B to gate the feedback connection to the DATA input. Divide-by functions greater than 10 can be achieved by use of multiple CD4018BMS units. The counter is advanced one count at the positive clock-signal transition. Schmitt Trigger action on the clock line permits unlimited clock rise and fall times. A high RESET signal clears the counter to an all-zero condition. A high PRESET-ENABLE signal allows information on the JAM inputs to preset the counter. Anti-lock gating is provided to assure the proper counting sequence. The CD4018BMS is supplied in these 16-lead outline packages: Braze Seal DIP Frit Seal DIP Ceramic Flatpack H1F H6W

Features

High Voltage Type (20V Rating) Medium Speed Operation 10MHz (typ.) at VDD - VSS = 10V Fully Static Operation 100% Tested for Quiescent Current at 20V Standardized Symmetrical Output Characteristics 5V, 10V and 15V Parametric Ratings Maximum Input Current at 18V Over Full Package-Temperature Range; at 18V and 25oC Noise Margin (Over Full Package Temperature Range): 1V at VDD 2V at VDD 2.5V at VDD = 15V Meets All Requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of `B' Series CMOS Devices"

Applications

Fixed and Programmable Divided- By-10, Counters Fixed and Programmable Counters Greater Than 10 Programmable Decade Counters Divide-By- "N" Counters/Frequency Synthesizers Frequency Division Counter Control/Timers

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 321-724-7143 | Copyright � Intersil Corporation 1999

DC Supply Voltage Range, (VDD). to +20V (Voltage Referenced to VSS Terminals) Input Voltage Range, All Inputs.-0.5V to VDD +0.5V DC Input Current, Any One Input.�10mA Operating Temperature Range. to +125oC Package Types K, H Storage Temperature Range (TSTG). to +150oC Lead Temperature (During Soldering). +265oC At Distance � 1/32 Inch � 0.79mm) from case for 10s Maximum

Thermal Resistance. ja jc Ceramic DIP and FRIT Package. 80oC/W 20oC/W Flatpack Package. 20oC/W o Maximum Package Power Dissipation (PD) +125 C For to +100oC (Package Type D, F, K). 500mW For to +125oC (Package Type D, F, K). Derate Linearity to 200mW Device Dissipation per Output Transistor. 100mW For TA = Full Package Temperature Range (All Package Types) Junction Temperature. +175oC

TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS GROUP A SUBGROUPS 1 2 VDD = 18V, VIN = VDD or GND Input Leakage Current IIL VIN = VDD or GND VDD = 18V Input Leakage Current IIH VIN = VDD or GND VDD = 18V Output Voltage Output Voltage Output Current (Sink) Output Current (Sink) Output Current (Sink) Output Current (Source) Output Current (Source) Output Current (Source) Output Current (Source) N Threshold Voltage P Threshold Voltage Functional IOH10 IOH15 VNTH VPTH F VDD 15V, No Load VDD 15V, No Load (Note 3) VDD = 5V, VOUT = 0.4V VDD = 10V, VOUT = 0.5V VDD = 15V, VOUT = 1.5V VDD = 5V, VOUT = 4.6V VDD = 5V, VOUT = 2.5V VDD = 10V, VOUT = 9.5V VDD = 15V, VOUT = 13.5V VDD = 10V, ISS = -10�A VSS = 0V, IDD = 10�A VDD = 2.8V, VIN = VDD or GND VDD = 20V, VIN = VDD or GND VDD = 18V, VIN = VDD or GND VDD = 3V, VIN = VDD or GND Input Voltage Low (Note 2) Input Voltage High (Note 2) Input Voltage Low (Note 2) Input Voltage High (Note 2) VIL VIH VIL VIH VDD = 5V, VOH > 4.5V, VOL < 0.5V VDD = 5V, VOH > 4.5V, VOL < 0.5V VDD = 15V, VOH > 13.5V, VOL < 1.5V VDD = 15V, VOH > 13.5V, VOL 8A 8B

NOTES: 1. All voltages referenced to device GND, 100% testing being implemented. 2. Go/No Go test with limits applied to inputs

3. For accuracy, voltage is measured differentially to VDD. Limit is 0.050V max.

TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS GROUP A SUBGROUPS TEMPERATURE 10, 11 VDD = 5V, VIN = VDD or GND 10, 11 VDD = 5V, VIN = VDD or GND +125oC, -55oC

PARAMETER Propagation Delay Clock To Q Propagation Delay Preset To Q Propagation Delay Reset To Q NOTES:

= 200K, Input TR, 2. -55oC and +125oC limits guaranteed, 100% testing being implemented. TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS LIMITS PARAMETER Supply Current SYMBOL IDD CONDITIONS VDD = 5V, VIN = VDD or GND VDD = 10V, VIN = VDD or GND VDD = 15V, VIN = VDD or GND Output Voltage Output Voltage Output Voltage Output Voltage Output Current (Sink) Output Current (Sink) Output Current (Sink) Output Current (Source) Output Current (Source) Output Current (Source) Output Current (Source) Input Voltage Low Input Voltage High Propagation Delay Clock To Q Propagation Delay Preset To Q Propagation Delay Reset to Q VOL VOH IOH10 IOH15 VIL VIH TPLH2 TPLH3 VDD 5V, No Load VDD 10V, No Load VDD 5V, No Load VDD 10V, No Load VDD = 5V, VOUT = 0.4V VDD = 10V, VOUT = 0.5V VDD = 15V, VOUT = 1.5V VDD = 5V, VOUT = 4.6V VDD = 5V, VOUT = 2.5V VDD = 10V, VOUT = 9.5V VDD =15V, VOUT = 13.5V VDD = 10V, VOH > 9V, VOL < 1V VDD = 10V, VOH > 9V, VOL < 1V VDD = 10V VDD = 15V VDD = 10V VDD = 15V VDD = 10V VDD = 15V NOTES TEMPERATURE C +25oC


Features

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