HomedatasheetCD574HC126

CD574HC126 Datasheet

CMOS/BiCMOS->HC/HCT Family
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Description

Features, Applications
Data sheet acquired from Harris Semiconductor SCHS144A
High Speed CMOS Logic Quad Buffer, Three-State
Description

The 'HC126 and 'HCT126 contain four independent threestate buffers, each having its own output enable input, which when "low" puts the output in the high-impedance state.

Features

Three-State Outputs Separate Output Enable Inputs Fanout (Over Temperature Range) - Standard Outputs. 10 LSTTL Loads - Bus Driver Outputs. 15 LSTTL Loads Wide Operating Temperature Range. to 125oC Balanced Propagation Delay and Transition Times Significant Power Reduction Compared to LSTTL Logic ICs HC Types to 6V Operation - High Noise Immunity: NIL = 30%, NIH 30% of VCC at VCC = 5V HCT Types to 5.5V Operation - Direct LSTTL Input Logic Compatibility, VIL= 0.8V (Max), VIH = 2V (Min) - CMOS Input Compatibility, 1�A at VOL, VOH

[ /Title HCT12 6) /Subject (High Speed CMOS Logic Quad Buffer, ThreeState)

PART NUMBER CD74HCT126E CD74HCT126M NOTES: 1. When ordering, use the entire part number. Add the suffix 96 to obtain the variant in the tape and reel. 2. Wafer and die for this part number is available which meets all electrical specifications. Please contact your local TI sales office or customer service for ordering information. TEMP. RANGE (oC) to 125 PACKAGE 14 Ld CERDIP 14 Ld PDIP 14 Ld SOIC 14 Ld CERDIP 14 Ld PDIP 14 Ld SOIC

CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. Copyright

TRUTH TABLE INPUTS L X NOTE: H = High Voltage Level L = Low Voltage Level X = Don't Care Z = High Impedance, OFF State nOE H L OUTPUTS L Z

DC Supply Voltage, VCC. 7V DC Input Diode Current, IIK For VI > VCC 0.5V.�20mA DC Output Diode Current, IOK For VO > VCC 0.5V.�20mA DC Drain Current, per Output, IO For VO < VCC 0.5V.�35mA DC Output Source or Sink Current per Output Pin, IO For VO < VCC 0.5V.�25mA DC VCC or Ground Current, ICC.�70mA

Thermal Resistance (Typical, Note 3) JA (oC/W) PDIP Package. 90 SOIC Package. 175 Maximum Junction Temperature. 150oC Maximum Storage Temperature to 150oC Maximum Lead Temperature (Soldering 10s). 300oC (SOIC - Lead Tips Only)

Temperature Range (TA). to 125oC Supply Voltage Range, VCC to 6V HCT 5.5V DC Input or Output Voltage, VI, VO. 0V to VCC Input Rise and Fall Time 2V. 1000ns (Max) 4.5V. 500ns (Max) 6V. 400ns (Max)

CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTE: JA is measured with the component mounted on an evaluation PC board in free air.

TEST CONDITIONS PARAMETER HC TYPES High Level Input Voltage VIH 4.5 6 Low Level Input Voltage VIL 4.5 6 High Level Output Voltage CMOS Loads VOH VIH or VIL -0.02 High Level Output Voltage TTL Loads Low Level Output Voltage CMOS Loads VOL VIH or VIL Low Level Output Voltage TTL Loads Input Leakage Current II VCC or GND �A SYMBOL VI (V) IO (mA) VCC (V) MIN 25oC TYP MAX TO 85oC MIN MAX TO 125oC MIN MAX UNITS


Features

Parameters


Manufacturer information

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