HomedatasheetCD74HC4094PW

CD74HC4094PW Datasheet

Counter Shift Registers
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Description

The CD74HC4094PW is 8−stage serial shift registers having a storage latch associated with each stage for strobing data from the serial input to parallel buffered three−stateoutputs. The parallel outputs may be connected directly to common bus lines. Data is shifted on positive clock transitions. The data in each shift register stage is transferred to the storage register when the Strobe input is high. Data in the storage register appears at the outputs whenever the Output−Enable signal is high. CD74HC4094PW Features • Buffered Inputs• Separate Serial Outputs Synchronous to Both Positive and Negative Clock Edges For Cascading• Fanout (Over Temperature Range)• Wide Operating T emperature Rang e . . . −55℃ to 125℃• Balanced Propagation Delay and Transition Times• Signi cant Power Reduction Compared to LSTTL Logic ICs• HC Types 2V to 6V Operation High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V• HCT Types 4.5V to 5.5V Operation Direct LSTTL Input Logic Compatibility, VIL= 0.8V (Max), VIH = 2V (Min) CMOS Input Compatibility, Il ≤1μA at VOL, VOH
Features

Parameters

[{"Name":"Propagation Delay Time","Value":"195 ns, 39 ns, 33 ns"},{"Name":"Maximum Operating Temperature","Value":"+ 125 C"},{"Name":"Minimum Operating Temperature","Value":"- 55 C"},{"Name":"Operating Supply Voltage","Value":"2.5 V, 3.3 V, 5 V"},{"Name":"","Value":""},{"Name":"","Value":""},{"Name":"","Value":""},{"Name":"","Value":""},{"Name":"","Value":""},{"Name":"","Value":""}]

Manufacturer information

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