CDP1802BCEX Datasheet

High-reliability CMOS 8-bit Microprocessor


Features, Applications


The CDP1802A/3 High-Reliability LSI CMOS 8-bit register oriented Central-Processing Unit (CPU) is designed for use as a general purpose computing or control element in a wide range of stored-program systems or products. The CDP1802A/3 includes all of the circuits required for fetching, interpreting, and executing instructions which have been stored in standard types of memories. Extensive input/output (I/O) control features are also provided to facilitate system design. The 1800 Series Architecture is designed with emphasis on the total microcomputer system as an integral entity so that systems having maximum flexibility and minimum cost can be realized. The 1800 Series CPU also provides a synchronous interface to memories and external controllers for I/O devices, and minimizes the cost of interface controllers. Further, the I/O interface is capable of supporting devices operating in polled, interrupt-driven, or direct memory-access modes. The CDP1802AC/3 is functionally identical to its predecessor, the CDP1802. The "A" version includes some performance enhancements and can be used as a direct replacement in systems using the CDP1802. This type is supplied in 40 lead dual-in-line sidebrazed ceramic packages (D suffix).


For Use In Aerospace, Military, and Critical Industrial Equipment Minimum Instruction Fetch-Execute Time of 4.5�s (Maximum Clock Frequency 3.6MHz) at VDD = +25oC Operation Over the Full Military Temperature Range. to +125oC Any Combination of Standard RAM and ROM to 65,536 Bytes 8�Bit Parallel Organization With Bidirectional Data Bus and Multiplexed Address Bus x 16 Matrix of Registers for Use as Multiple Program Counters, Data Pointers, or Data Registers On-Chip DMA, Interrupt, and Flag Inputs High Noise Immunity. 30% of VDD

[ /Title 802AC /3) /Subject (HighReliability CMOS 8-Bit Microprocessor) /Autho r /Keywords (Intersil Corporation, 8-bit microprocessors, 8 bit microprocessors, peripherals) /Creator /DOCI NFO pdfmark

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. http://www.intersil.com 407-727-9207 | Copyright � Intersil Corporation 1999

DC Supply Voltage Range, (VDD) (All Voltages Referenced to VSS Terminal) to +7V Input Voltage Range, All Inputs. -0.5V to VDD +0.5V DC Input Current, any One Input.�10mA

Thermal Resistance (Typical) JA (oC/W) JC (oC/W) SBDIP Package. 55 15 Device Dissipation Per Output Transistor TA = Full Package Temperature Range. 100mW Operating Temperature Range (TA) Package Type to +125oC Storage Temperature Range to +150oC Lead Temperature (During Soldering) At distance 1/16 �1/32 In. (1.59 �0.79mm) from case for 10s max. +265oC

CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

Recommended Operating Conditions TA = Full Package Temperature Range. For maximum reliability, operating conditions

should be selected so that operation is always within the following ranges PARAMETER DC Operating Voltage Range Input Voltage Range Maximum Clock Input Rise or Fall Time MIN 4 VSS MAX 6.5 VDD 1 UNITS V �s

PARAMETER Minimum Instruction Time (Note 1) Maximum DMA Transfer Rate Maximum Clock Input Frequency, Load Capacitance (CL) = 50pF, fCL NOTE: 1. Equals 2 machine cycles - one Fetch and one Execute operation for all instructions except Long Branch and Long Skip, which require 3 machine cycles - one Fetch and two Execute operations. VDD (V) 340 DC-2.7 UNITS �s Kbytes/s MHz

PARAMETER Quiescent Device Current, IDD Output Low Drive (Sink) Current (Except XTAL), IOL XTAL Output High Drive (Source) Current (Except XTAL), IOH XTAL Output Voltage Low-Level, VOL Output Voltage High-Level, VOH



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