The CDP1822 and CDP1822C are by 4-bit static random-access memories designed for use in memory systems where high speed, low operating current, and simplicity in use are desirable. The CDP1822 features high speed and a wide operating voltage range. Both types have separate data inputs and outputs and utilize single power supplies to 6.5V for the CDP1822C and to 10.5V for the CDP1822. Two Chip-Select inputs are provided to simplify system expansion. An Output Disable control provides Wire-OR capability and is also useful in common Input/Output systems. The Output Disable input allows these RAMs to be used in common data Input/Output systems by forcing the output into a high-impedance state during a write operation independent of the Chip-Select input condition. The output assumes a high-impedance state when the Output Disable is at high level or when the chip is deselected by CS1 and/or CS2. The high noise immunity of the CMOS technology is preserved in this design. For TTL interfacing at 5V operation, excellent system noise margin is preserved by using an external pull-up resistor at each input.Features
Low Operating Current - VDD = 5V, Cycle Time 1�s. 8mA Industry Standard Pinout Two Chip-Select Inputs-Simple Memory Expansion Memory Retention for Standby Battery Voltage of 2V Minimum Output-Disable for Common I/O Systems Three-State Data Output for Bus-Oriented Systems Separate Data Inputs and Outputs10V CDP1822E PACKAGE PDIP Burn-In SBDIP Burn-In to +85oC TEMP. RANGE to +85oC PKG. NO.
OPERATIONAL MODES INPUTS CHIP SELECT (CS1) 0 CHIP SELECT (CS2) 1 OUTPUT READ/ DISABLE WRITE (OD) (R/W)OUTPUT Read Data In High Impedance High Impedance High Impedance High Impedance
Logic 1 = High, Logic 0 = Low, X = Don't Care.
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. http://www.intersil.com 407-727-9207 | Copyright � Intersil Corporation 1999
DC Supply Voltage Range, (VDD) (All Voltages Referenced to VSS Terminal) to +7V Input Voltage Range, All Inputs. -0.5V to VDD +0.5V DC Input Current, Any One Input.�10mA
Thermal Resistance (Typical) JA (oC/W) JC (oC/W) PDIP Package. 75 N/A SBDIP Package. 80 21 Maximum Operating Temperature Range (TA) Package Type to +125oC Package Type to +85oC Maximum Junction Temperature Ceramic Package. 175oC Plastic Package. 150oC Storage Temperature Range to +60oC (Package Type E). to +85oC (Package Type E). Derate Linearly to 200mW Lead Temperature (During Soldering). 300oC
Recommended Operating Conditions TA = Full Package Temperature Range. For maximum reliability, operating conditionsshould be selected so that operation is always within the following ranges:
LIMITS CDP1822 PARAMETER DC Operating Voltage Range Input Voltage Range SYMBOL MIN 4 VSS MAX 10.5 VDD MIN 4 VSS CDP1822C MAX 6.5 VDD UNITS VStatic Electrical Specifications to +85oC, Except as Noted (Continued)
CONDITIONS CDP1822 PARAMETER Operating Current (Note 2) Three-State Output Leakage Current Input Capacitance Output Capacitance NOTES: 1. Typical values are for = +25oC and nominal VDD. 2. Outputs open circuited; Cycle time = 1�s. SYMBOL IDD1 VO (V) IOUT CIN COUT VIN (V) VDD (V) MIN (NOTE 1) TYP MAX MIN LIMITS CDP1822C (NOTE 1) TYP 5 10 MAX UNITS �A pF
100 pF TEST CONDITIONS CD1822 PARAMETER Read Cycle Times (Figure 1) Read Cycle tRC 5 10 Access from Address tAA 5 10 Output Valid from Chip-Select 5 10 Output Valid from Chip-Select 5 10 Output Valid from Output Disable 5 10 Output Hold from Chip-Select 5 10 Output Hold from Chip-Select 5 10 Output Hold from Output Disable 5 10 NOTES: 1. Time required by a limit device to allow for indicated function. 2. Typical values are for = 25oC and nominal VDD. ns VDD (V) (NOTE 1) MIN (NOTE 2) TYP MAX (NOTE 1) MIN LIMITS CDP1822C (NOTE 2) TYP MAX UNITS