HomedatasheetCLC533

CLC533 Datasheet

High Speed, 4:1, Analog Multiplexer
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Description

Features, Applications

The is a high-speed 4:1 multiplexer employing active input and output stages. The CLC533 also employs a closed-loop design which dramatically improves accuracy over conventional analog multiplexer circuits. This monolithic device is constructed using an advanced high-performance bipolar process. The CLC533 has been specifically designed to provide a 24ns settling time to 0.01%. This coupled with the adjustable bandwidth, makes the CLC533 an ideal choice for infrared and CCD imaging systems, with channel-to-channel isolation @ 10MHz. Low distortion and spurious signal levels (-80dBc) make the CLC533 a very suitable choice for I/Q processors in radar receivers. The CLC533 is offered over both the industrial and military temperature ranges. The industrial versions, CLC533AJP\AJE\AIB, are specified from to +85�C and are packaged in 16-pin plastic DIPs, SOIC's and CERDIP packages. The extended temperature versions, CLC533A8B/A8L-2A, are specified from to +125�C and are packaged in 16-pin CERDIP and 20-terminal LCC packages. Ordering Information... CLC533A8B 16-pin plastic DIP 16-pin plastic SOIC dice 16-pin CERDIP, to +85�C dice, +125�C 20-terminal LCC, MIL-STD-883 Contact factory for other packages and DESC SMD number. +85�C +125�C

Features

12-bit settling � 17ns Low noise � 42�Vrms Isolation 110MHz -3dB bandwidth (Av = +2) Low distortion @ 5MHz Adjustable bandwidth � 180MHz (max) Infrared system multiplexing CCD sensor signals Radar I/Q switching High definition video HDTV Test and calibration

Applications

CLC533 Electrical Characteristics (+Vcc = +5.0V; -Vee = -5.2V; Rin = 500; CCOMP = 8pf; ECL Mode, pin 13 = NC)

FREQUENCY DOMAIN RESPONSE -3dB bandwidth VOUT 0.1Vpp -3dB bandwidth VOUT = 2Vpp gain flatness VOUT < 0.1Vpp peaking to 200MHz rolloff to 100MHz linear phase deviation to 100MHz crosstalk rejection - 1 channel 2Vpp, 30MHz crosstalk rejection - 3 channels 2Vpp, 30MHz TIME DOMAIN PERFORMANCE rise and fall time settling time2 overshoot slew rate SWITCH PERFORMANCE channel to channel switching time (2V step at output) switching transient 2V step 0.5V step 2V step �0.1% 2.0V step

MHz dB deg ns % V/�s ns mV dBc nV/Hz mVrms pA/Hz mV �V/�C �A �A/�C k pF V/V %FS V mA

DISTORTION AND NOISE PERFORMANCE 2nd harmonic distortion 5MHz 3rd harmonic distortion 2Vpp, 5MHz equivalent input noise spot noise voltage > 1MHz integrated noise to 100MHz spot noise current STATIC AND DC PERFORMANCE * analog output offset temperature coefficient * analog input bias current temperature coefficient analog input resistance analog input capacitance * gain accuracy integral endpoint linearity output voltage output current output resistance DIGITAL INPUT PERFORMANCE ECL mode (DREF floating) input voltage logic HIGH input voltage logic LOW input current logic HIGH input current logic LOW TTL mode (DREF = +5V) input voltage logic HIGH input voltage logic LOW input current logic HIGH input current logic LOW POWER REQUIREMENTS * supply current (+VCC +5.0V) * supply current (-Vee = -5.2V) nominal power dissipation * power supply rejection ratio no load no load no load

Min/max ratings are based on product characterization and simulation. Individual parameters are tested as noted. Outgoing quality levels are determined from tested parameters.

CLC533 Typical Performance Characteristics (TA = 25�C, +Vcc = +5V, -Vee = 500 unless specified)

Features

Parameters


Manufacturer information

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