Contents Page Section Title Introduction Main Features Differences between DAC 3555A and DAC 3550A Functional Description I2S Interface Interpolation Filter Variable Sample and Hold 3rd-order Noise Shaper and Multibit DAC Analog Low-pass Input Select and Mixing Matrix Postfilter Op Amps, Deemphasis Op Amps, and Line-Out Analog Volume Headphone Amplifier Clock System Standard Mode MPEG Mode I2C Bus Interface Registers Chip Select Power Modes Oscillator Specifications Outline Dimensions Pin Connections and Short Descriptions Pin Descriptions Power Supply Pins Analog Audio Pins Oscillator and Clock Pins Other Pins Pin Configuration Pin Circuits Control Registers Electrical Characteristics Absolute Maximum Ratings Recommended Operating Conditions Characteristics
Applications Line Output Details Recommended Low-Pass Filters for Analog Outputs Recommendations for Filters and Deemphasis Recommendations for MegaBass Filter without Deemphasis Power-up/down Sequence Power-up Sequence Power-down Sequence Typical Applications Data Sheet History
Stereo Audio DAC 1. Introduction The DAC is a single-chip, high-precision, stereo digital-to-analog converter designed for audio applications. The employed conversion technique is based on oversampling with noise-shaping. With Micronas' unique multibit sigma-delta technique, less sensitivity to clock jitter, high linearity, and a superior S/N ratio have been achieved. The DAC 3555A is controlled via I2C bus. Digital audio input data is received by a versatile I S interface. The analog back-end consists of internal analog filters and op amps for cost-effective additional external sound processing. The DAC 3555A provides line-out, headphone/speaker amplifiers, and volume control. Moreover, mixing additional analog audio sources to the D/A-converted signal is supported. The DAC 3555A is designed for all kinds of applications in the audio and multimedia field, such as: MPEG players, CD players, DVD players, CD-ROM players, mobile phones, etc. The DAC 3555A ideally complements the MP3 audio decoders MAS 3507D, MAS 35x9F, and PUC 303xA. No crystal or external clock required for standard applications with sample rates from to 48 kHz and 96 kHz. It is required for automatic sample rate detection below 32 kHz, MPEG mode (refer to Section 2.10.1.), and use of clock output CLKOUT.
� SNR of 103 dB(A) � I2C bus, I2S bus � internal clock oscillator � sample rates from 8 kHz to 96 kHz � analog deemphasis for 44.1 kHz � analog volume and balance: +18...-75 dB and mute � THD better than 0.01% � two additional analog stereo inputs (AUX) with source selection and mixing � supply range: V � zero-power mode � additional line-out � on-chip op amps for cost-effective external analog sound processing � pin-compatible to DAC or PQFN40 package
1.2. Differences between DAC 3555A and DAC 3550A � new zero-power mode � operation in I2C mode only. Stand-alone operation is not supported. � new quiet wake-up mode: after power-on, the DAC 3555A switches into zero-power mode. Waking-up is done via I2C command. This feature avoids audible "plops". � sample rates to 96 kHz � not register-compatible to DAC 3550A
1.1. Main Features � no master main input clock required � no external crystal required � integrated stereo headphone amplifier and mono speaker amplifier