q VOUT AND IOUT MODELS q HIGH ACCURACY: Linearity Error �0.0015% of FSR max Differential Linearity Error �0.003% of FSR max q MONOTONIC (at 15 bits) OVER FULL SPECIFICATION TEMPERATURE RANGE q PIN-COMPATIBLE WITH DAC72 q DUAL-IN-LINE PLASTIC AND HERMETIC CERAMIC AND SOIC Digital inputs are complementary binary coded and are TTL-, LSTTL-, 54/74C- and 54/74HC-compatible over the entire temperature range. Outputs to �2mA, and �1mA are available. These D/A converters are packaged in hermetic 24-pin ceramic side-brazed or molded plastic. The DIP-packaged parts are pin-compatible with the voltage and current output DAC71 and DAC72 model families. The DAC702 is also pin-compatible with the DAC70 model family. In addition, the DAC703 is offered a 24-pin SOIC package for surface mount applications.DESCRIPTION
The DAC70X family comprise of complete 16-bit digital-to-analog converters that includes a precision buried-zener voltage reference and a low-noise, fastsettling output operational amplifier (voltage output models), all on one small monolithic chip. A combination of current-switch design techniques accomplishes not only 15-bit monotonicity over the entire specified temperature range, but also a maximum end-point linearity error �0.0015% of full-scale range. Total full-scale gain drift is limited to �10ppm/�C maximum (LH and CH grades).Common Summing Junction Output Voltage Models Only Gain Adjust V DD
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At +25�C and rated power supplies, unless otherwise noted. DAC702/703J PARAMETER INPUT DIGITAL INPUT Resolution Digital Inputs (1) VIH VIL IIH, = +2.7V IIL, = +0.4V +VCC +40 �0.5 Bits �A mA MIN TYP MAX DAC701/702/703K MIN TYP MAX DAC701/702/703B, S MIN TYP MAX DAC701/702/703L, C MIN TYP MAX UNITS
TRANSFER CHARACTERISTICS ACCURACY(2) Linearity Error(4) Differential Linearity Error(4) Differential Linearity Error at Bipolar Zero (DAC702/703)(4) Gain Error(5) Zero Error(5, 6) Monotonicity Over Spec. Temp Range DRIFT (over specification temperature range) Total Error Over Temperature Range (all models)(7) Total Full Scale Drift: DAC701 DAC702/703 Gain Drift (all models) Zero Drift: DAC701 DAC702/703 Differential Linearity Over Temp.(4) Linearity Error Over Temp.(4) SETTLING TIME (to FSR)(8) DAC701/703 (VOUT Models) Full Scale Step, 2k Load 1LSB Step at Worst-Case Code(9) Slew Rate DAC702 (IOUT Models) Full Scale Step to 100 Load 1k Load OUTPUT VOLTAGE OUTPUT MODELS DAC701 (CSB Code) DAC703 (COB Code) Output Current Output Impedance Short Circuit to Common Duration CURRENT OUTPUT MODELS DAC702 (COB Code)(10) Output Impedance(10) Compliance Voltage % of FSR
At +25�C and rated power supplies, unless otherwise noted. DAC702/703J PARAMETER REFERENCE VOLTAGE Voltage Source Current Available for External Loads Temperature Coefficient Short Circuit to Common Duration POWER SUPPLY REQUIREMENTS Voltage: +VCC �VCC VDD Current (No Load): DAC702 (IOUT Models) +VCC �VCC VDD DAC701/703 (VOUT Models) +VCC �VCC VDD Power Dissipation: (VDD DAC702 DAC701/703 Power Supply Rejection: +VCC �VCC VDD TEMPERATURE RANGE Specification: B, C Grades S Grades K, L Grades Storage: Ceramic Plastic, SOIC T �C MIN TYP +2.5 �10 Indefinite MAX DAC701/702/703K MIN +6.0 +1.5 TYP +6.3 T MAX DAC701/702/703B, S MIN T �25 TYP +6.3 T MAX DAC701/702/703L, C MIN T �15 TYP MAX T UNITS V mA ppm/�C
T Specification same as model to the left. NOTES: (1) Digital inputs are TTL, LSTTL, 54/74C, 54/74HC, and 54/74HTC compatible over the operating voltage range of VDD to +15V and over the specified temperature range. The input switching threshold remains at the TTL threshold of 1.4V over the supply range of VDD +15V. As logic "0" and logic "1" inputs vary over to +0.8V and to +10V respectively, the change in the D/A converter output voltage will not exceed �0.0015% of FSR for the LH and CH grades, �0.003% of FSR for the BH grade and �0.006% of FSR for the KG grade. (2) DAC702 (current-output models) is specified and tested with an external output operational amplifier connected using the internal feedback resistor in all parameters except settling time. (3) FSR means full-scale range and is 20V for the �10V range (DAC703), 10V for the to +10V range (DAC701). FSR is 2mA for the �1mA range �0.0015% of full-scale range is equivalent in 15-bit resolution. �0.003% of full-scale range is equivalent in 14-bit resolution. �0.006% of full-scale range is equivalent in 13-bit resolution. (5) Adjustable to zero with external trim potentiometer. Adjusting the gain potentiometer rotates the transfer function around the zero point. (6) Error at input code FFFFH for DAC701, 7FFFH for DAC702 and DAC703. (7) With gain and zero errors adjusted to zero +25�C. (8) Maximum represents the 3 limit. Not 100% tested for this parameter. (9) At the major carry, to 8000H and 7FFFH. (10) Tolerance on output impedance and output current �30%. (11) Power dissipation is an additional 40mW when VDD is operated at +15V.
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user's own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant any BURR-BROWN product for use in life support devices and/or systems.