HomedatasheetDAC8544Y/1K

DAC8544Y/1K Datasheet

Quad 16-Bit Quad Rail-to-rail Voltage Output Parallel Interface Digital-to-analog Converter
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Description

Features, Applications

QUAD, 16-BIT, RAIL-TO-RAIL VOLTAGE OUTPUT, PARALLEL INTERFACE, DIGITAL-TO-ANALOG CONVERTER
FEATURES

Single Supply: +5.5 V Micropower Operation: 5 V Rail-To-Rail Voltage Output Ultralow Crosstalk: �110 dB Settling Time: To �0.003% FSR 16-Bit Monotonic Offset Error: �0.3 mV Gain Error: �1 mV Total Error: �3 mV Per-Channel VREF+, VREF�, VFB Pins Logic Compatible: +5.5 V Readback Capability Double Buffered Inputs Simultaneous or Sequential Update Schmitt-Triggered Digital Inputs Hardware Reset 48-Lead TQFP Package

DESCRIPTION

The is a low-power, quad-channel, 16-bit, voltage output DAC. Its on-chip precision output amplifier allows rail-to-rail voltage swing to be achieved at the output. The is 16-bit monotonic and offers exceptional absolute accuracy with ultralow crosstalk. The DAC8544 uses a 16-bit parallel interface and features additional power-down function pins as well as hardware-enabled, synchronous DAC updating and reset capability. The DAC8544 requires an external reference voltage to set the output range of the DAC. The device incorporates a power-on-reset circuit that ensures that the DAC outputs power up at zero volt and remains there until a valid write takes place. In addition, the DAC8544 contains a power-down feature, accessed via PD pin, that reduces the current consumption of the device 5 V. The power consumption is typically under mW at VDD 5 V. The DAC8544 is available a 48-lead TQFP package with an operating temperature range to +105�C.

APPLICATIONS

Process Control Data Acquisition Systems Closed-Loop Servo Control PC Peripherals Optical Networking

IOVDD IOGND VDD GND Power-On Reset D0 CS LDAC RST R/W DAC Register
VOUTA VFBB VOUTB VFBC VOUTC VFBD VOUTD

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. AVAILABLE OPTIONS

PRODUCT DAC8544 PACKAGE 48 - TQFP PACKAGE DRAWING NUMBER PFB to 105�C PACKAGE MARKING DAC8544I ORDERING NUMBER DAC8544IPFB DAC8544IPFBR TRANSPORT MEDIA Tray Tape and Reel

over operating free-air temperature range (unless otherwise noted) (1)

VDD to GND IOVDD to IOGND Digital input voltage to IOGND VOUT to GND Operating temperature range Storage temperature range, Tstg Junction temperature, TJ max V to IOVDD V to VDD 150�C +150�C

Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

VDD k to GND; pF to GND; all specifications to +105�C unless otherwise noted

DAC8544 PARAMETER STATIC PERFORMANCE (1) Resolution Relative Accuracy Differential Nonlinearity Zero-Code Offset Error Zero-Code Error Drift DC Crosstalk AC Crosstalk Gain Error Gain Error Drift Measured at code 64714, 25�C Full-Scale Error OUTPUT CHARACTERISTICS (2) Output Voltage Range Output Voltage Settling Time Slew Rate <200 pF VREF V �s V/�s Measured at code 105�C 1-kHz sine wave Measured at code 64714, 25�C Measured at code 105�C 16-Bit Monotonic Measured at code 485, 25�C Measured at code to 105�C All zeroes loaded to DAC register �5.0 mV ppm of FSR/�C Bits %FSR LSB mV �V/�C LSB dB CONDITIONS MIN TYP MAX UNITS

Linearity calculated using a reduced code range to 64714. Output unloaded. Assured by design and characterization, not production tested.

VDD k to GND; pF to GND; all specifications to +105�C unless otherwise noted

DAC8544 PARAMETER Capacitive Load Stability Digital-to-Analog Glitch Impulse Digital Feedthrough DC Output Impedance Short-Circuit Current VDD +5 V VDD +3 V Coming out of power-down mode, VDD +5 V Coming out of power-down mode, VDD +3 V IOVDD +5.5 V IOVDD 0.7 x IOVDD 2.7 1.8 DAC active and excluding load current VIH = IOVDD and VIL = IOGND VIH = IOVDD and VIL = IOGND VIH = IOVDD and VIL = IOGND VIH = IOVDD and VIL = IOGND ILOAD = 2 mA, VDD 0.3 x IOVDD 2 k CONDITIONS MIN TYP �s MAX UNITS pF nV-s mA

REFERENCE INPUT VREF+ Input Range VREF� Input Range Reference Input Impedance LOGIC INPUTS Input Current VINL, Input Low Voltage VINH, Input High Voltage Pin Capacitance POWER REQUIREMENTS VDD IOVDD IDD (Normal Mode) VDD +5.5 V VDD +3.6 V IDD (All Power-Down Modes) VDD +5.5 V VDD +3.6 V POWER EFFICIENCY IOUT/IDD V pF VDD V k


Features

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