HomedatasheetDAC8806IDBRG4

DAC8806IDBRG4 Datasheet

The DAC8806, a multiplying digital-to-analog converter(DAC), is designed to operate from a single 2.7V to 5.5V supply. <br> <br> The applied external reference input voltage VREF determines the full-
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Features, Applications

FEATURES

�0.5LSB DNL �1LSB INL 14-Bit Monotonic Low Noise: 10nV/Hz Low Power: IDD = 2�A Analog Power Supply: +5.5V 1.66mA Full-Scale Current, with VREF = 10V Settling Time: 0.5�s 4-Quadrant Multiplying Reference Bandwidth: 8MHz Reference Input: �15V Reference Dynamics: �105THD SSOP-28 Package Industry-Standard Pin Configuration

APPLICATIONS
Automatic Test Equipment Instrumentation Digitally Controlled Calibration Industrial Control PLCs
DESCRIPTION

The DAC8806, a multiplying digital-to-analog converter (DAC), is designed to operate from a single to 5.5V supply. The applied external reference input voltage VREF determines the full-scale output current. An internal feedback resistor (RFB) provides temperature tracking for the full-scale output when combined with an external, current-to-voltage (I/V) precision amplifier. A parallel interface offers high-speed communications. The DAC8806 is packaged in a space-saving SSOP-28 package and has an industry-standard pinout.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

MINIMUM RELATIVE ACCURACY (LSB) �1 DIFFERENTIAL NONLINEARITY (LSB) �1 PACKAGELEAD (DESIGNATOR) DB-28 (SSOP) SPECIFIED TEMPERATURE RANGE to +85�C PACKAGE MARKING DAC8806 ORDERING NUMBER DAC8806IDB DAC8806IDBR TRANSPORT MEDIA, QUANTITY Tubes, 48 Tape and Reel, 2000

For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com.

over operating free-air temperature range (unless otherwise noted) (1)

DAC8806 VDD to GND Digital input voltage to GND V (IOUT) to GND Operating temperature range REF, ROFS, RFB, R1, RCOM to AGND, and DGND Storage temperature range Junction temperature range (TJ max) Power dissipation Thermal impedance, RJA ESD rating: Human body model (HBM) Charged device model (CDM) �0.3 to +VDD �0.3 to +VDD +150 +125 (TJ max � TA)/RJA 55 UNIT �C W �C/W

Stresses above those listed under absolute maximum ratings may cause permanent damage to the device. Exposure to absolute maximum conditions for extended periods may affect device reliability.

All specifications to +85�C, VDD to +5.5V, IOUT = virtual GND, GND = 0V, VREF = 10V, and TA = full operating temperature, unless otherwise noted.

DAC8806 PARAMETER STATIC PERFORMANCE Resolution Relative accuracy Differential nonlinearity Output leakage current Output leakage current Full-scale gain error Full-scale temperature coefficient Bipolar zero scale error PSRR OUTPUT CHARACTERISTICS (1) Output current Output capacitance REFERENCE INPUT VREF range RREF Input capacitance R1/R2 ROFS, RFB LOGIC INPUTS AND OUTPUT (1) Input low voltage Input high voltage Input leakage current Input capacitance VIL VDD = +2.7V VIL VDD = +5V VIH VDD = +2.7V VIH VDD = +5V IIL CIL tDS Data to WR setup time tDH Data to WR hold time tWR WR pulse width tLDAC LDAC pulse width Data setup time Data hold time tRST RST pulse width tLWD WR to LDAC delay time tDS Data to WR setup time tDH Data to WR hold time tWR WR pulse width tLDAC LDAC pulse width Data setup time Data hold time (1) tRST RST pulse width tLWD WR to LDAC delay time ns R1/R2 resistance (bipolar) Feedback and offset resistance 9 Input resistance (unipolar) pF k Code dependent mA pF Power-supply rejection ratio; VDD 5V �10% Data = +25�C Data TA = TMAX Unipolar, data = 3FFFh Bipolar, data 3FFFh DAC8806 Bits LSB nA LSB ppm/�C LSB LSB/V CONDITIONS MIN TYP MAX UNITS


Features

Parameters

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