DFP16 Datasheet

Military, Hot Solder Dip or Gold Plated Leads, Highly Stable, Passes MIL-STD-202 Method 210, Condition e ""Resistance to Soldering Heat"" Test


Features, Applications

Thick Film Resistor Networks Flat Pack, 11, 12 Schematics

11 and 12 Schematics 0.065" [1.65mm] height for high density packaging Low temperature coefficient � 100ppm/�C Hot solder dipped leads Highly stable thick film Wide resistance range All devices are capable of passing the MIL-STD-202, Method 210, Condition C "Resistance to Soldering Heat" test

1) Temperature Range: + 125�C Consult factory for stocked values

The DFPxx-11 provide the user with or 8 nominally equal resistors with each resistor isolated from all others. Commonly used in the following applications: "Wired OR" Pull-up Long-line Impedance Balancing Power Driven Pull-up LED Current Limiting Power Gate Pull-up ECL Output Pull-down Line Termination TTL Input Pull-down

The DFPxx-12 provide the user with a choice or 15 nominally equal resistors, each connected to a common pin or 16). Commonly used in the following applications: MOS/ROM Pull-up/Pull-down TTL Input Pull-down Open Collector Pull-up Digital Pulse Squaring "Wired OR" Pull-up TTL Unused Gate Pull-up Power Driven Pull-up High Speed Parallel Pull-up

DFP MODEL 14 NUMBER OF PINS 11 12 SCHEMATIC 102 RESISTANCE VALUE The first 2 digits (3 for "F" tolerance) are significant figures. The last digit specifies the number of zeros to follow. G TOLERANCE � 5%

EXAMPLE: = A flat pack thick film network with 14 pins 0.050" [1.27mm] centers, 11 Schematic, resistance of 1000 ohms and tolerance � 2%, with Type G hot solder dipped terminals. EXAMPLE: = A flat pack thick film network with 14 pins 0.050" [1.27mm] centers, 12 Schematic, resistance of 1000 ohms and tolerance � 2%, with Type G hot solder dipped terminals. www.vishay.com 122 For Technical Questions, contact: ff2aresistors@vishay.com Document Number: 31513 Revision 01-Aug-02

Thick Film Resistor Networks, Flat Pack

PARAMETER Isolation Resistance 11 Schematic Voltage Coefficient of Resistance: Maximum Operating Voltage: Operating Temperature Range: Storage Temperature Range: UNIT M ppm/V VDC �C DFP14 typical + 150

Marking: Marking Resistance to Solvents: Solderability: Terminals: Model number, schematic number, value tolerance, pin 1 indicator, date code. Permanency testing per MIL-STD-202 Method 215. Per MIL-STD-202, Method 208E. Per DFPxx12 = Type G (hot solder dipped). Hot solder dipped leads supplied as standard finish. Epoxy filled ceramic sandwich

TEST Power Conditioning Thermal Shock Short Time Overload Low Temperature Operation Moisture Resistance to Soldering Heat Shock Vibration Load Life Terminal Strength Insulation Resistance Dielectric Withstanding Voltage CONDITIONS 1.5 x rated power, applied 1.5 hours "ON" and 0.5 hour "OFF" for 100 hours � 4 hours + 25�C ambient temperature 5 cycles between - 65�C and 2.5 x rated working voltage, 5 seconds 45 minutes at full rated working voltage 65�C 240 hours with humidity ranging from 98% RH Leads immersed + 260�C solder to within 1/16" of body for 10 seconds Total of 18 shocks at 100 G's 12 hours at maximum of 20 G's between 10 and Hz 1000 hours + 70�C, rated power applied 1.5 hours "ON", 0.5 hour "OFF" for full 1000 hour period. Derated according to the curve. 1.5 pound pull for 30 seconds 10,000 Megohm (minimum) No evidence of arcing or damage (200 V RMS for 1 minute) For Technical Questions, contact: ff2aresistors@vishay.com



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