DG507A-MIL Datasheet

Single 16-ch/differential 8-Ch CMOS Analog Multiplexers


Features, Applications


Low On-Resistance: 240 W TTL and CMOS Logic Compatible Low Power: 30 mW Break-Before-Make Switching 44-V Power Supply Rating Transition Time: 600 ns

Easily Interfaced Low Power Consumption Low System Crosstalk Wide Analog Signal Range

Communication Systems ATE Data Acquisition Systems Audio Signal Routing and Multiplexing Medical Instrumentation


A channel in the on state conducts current equally well in both directions. In the off state each channel blocks voltages up to the power supply rails, normally 30 V peak-to-peak. An enable (EN) function allows for device selection when several multiplexers are used. All control inputs, address (AX) and enable (EN) are TTL or CMOS compatible over the full specified operating temperature range. ESD protection for ruggedness. An epitaxial layer prevents latch up.

The DG506A_MIL/507A_MIL are available in hermetic packages. For plastic packages, use the DG406/407 as pin-for-pin replacements. For wideband/video recommended. multiplexing, the DG536 is

The DG506A_MIL/507A_MIL are fabricated in the Vishay Siliconix PLUS-40 process, which includes improved

28-Pin CerDIP �55 28-Pin Sidebraze LCC-28* *Block Diagram and Pin Configuration not shown.

Voltage Referenced to V� V+. 44 V GND. 25 V Digital Inputsa, VS, VD. (V�) V to (V+) or 20 mA, whichever occurs first Current (Any Terminal, Except S or D). 30 mA Continuous Current, 20 mA Peak Current, or D (Pulsed at 1 ms, 10% Duty Cycle Max). 40 mA Storage Temperature (CerDIP). to 150_C (Plastic DIP). to 125_C Notes: a. Signals on SX, DX or INX exceeding or V� will be clamped by internal diodes. Limit forward diode current to maximum current ratings. b. All leads soldered or welded to PC board. c. Derate 14 mW/_C above 75_C. Power Dissipation (Package)b 28-Pin CerDIP and Sidebraze. mW 28-Pin PLCCNO TAG. 1000 mW

Test Conditions Unless Otherwise Specified Parameter Analog Switch

Analog Signal Rangee Drain-Source On-Resistance rDS(on) Matchingg Source Off Leakage Current Drain Off Leakage Current VANALOG rDS(on) DrDS(on) IS(off) #10 V VEN 0 V VD= "10 V VEN DG507A_MIL DG506A_MIL ID(on) V DG507A_MIL Full Room Full Room Full Room Full Room Full Room Full Room Full W %

g Input p Current Logic Input High I t Voltage Hi h Logic Input Current Input Voltage Low 2.4 V IAH 15 V IAL VEN 0 V Room Full Room Full Room Full mA

Transition Time Break-Before-Make Time Enable Turn-On Time Enable Turn-Off Time Charge Injection Off Isolationh Source Off Capacitance Drain Off Capacitance tTRANS tOPEN tON(EN) tOFF(EN) Q OIRR CS(off) CD(off) VEN = 7 VRMS, = 500 kHz VEN = 140 kHz VEN VD 140 kHz DG506A_MIL DG507A_MIL See Figure 2 See Figure 4 See Figure 3 Room 1.0 ms

Positive Supply Current Negative Supply Current I+ I� VEN 0 V Room mA

Notes: a. Refer to PROCESS OPTION FLOWCHART. b. Room = 25_C, Full = as determined by the operating temperature suffix. c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. e. Guaranteed by design, not subject to production test. f. VIN = input voltage to perform proper function. r DS(on)MAX � r DS(on)MIN g. Dr DS(on) + r DS(on)AVE



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