The DG507A, DG508A and DG509A are CMOS Monolithic 16-Channel/Dual 8-Channel and 8-Channel/Dual 4-Channel Analog Multiplexers, which can also be used as demultiplexers. An enable input is provided. When the enable input is high, a channel is selected by the address inputs, and when low, all channels are off. A channel in the ON state conducts current equally well in both directions. In the OFF state each channel blocks voltages up to the supply rails. The address inputs and the enable input are TTL and CMOS compatible over the full specified operating temperature range. The DG507A, DG508A and DG509A are pinout compatible with the industry standard devices.Features
Low Power Consumption TTL and CMOS-Compatible Address and Enable Inputs 44V Maximum Power Supply Rating High Latch-Up Immunity Break-Before-Make Switching Alternate SourceApplications
Data Acquisition Systems Communication Systems Signal Multiplexing/Demultiplexing Audio Signal Multiplexing
PART NUMBER DG507ACJ DG507ACY TEMP. RANGE (oC) to 70 PACKAGE 28 Ld CERDIP 28 Ld PDIP 28 Ld SOIC 28 Ld CERDIP 28 Ld PDIP 28 Ld SOIC PKG. NO. E28.6 M28.3 PART NUMBER DG509ACJ DG509ACY TEMP. RANGE (oC) to 70 PACKAGE 16 Ld CERDIP 16 Ld CERDIP 16 Ld PDIP 16 Ld PDIP 16 Ld SOIC PKG. NO. E16.3 M16.3
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 321-724-7143 | Copyright � Intersil Corporation 1999A3 EN ADDRESS DECODER OF 16 ENABLE A2 EN (ENABLE INPUT) DB ADDRESS DECODER OF 8 ENABLE S8A DA
4 Line Binary Address Inputs and = 5V Above example shows channel 2 turned ON. DG508A
3 Line Binary Address Inputs 0 0) and = 5V Above example shows channels 1A and 1B turned ON. DG509A
3 Line Binary Address Inputs 0 1) and = 1 Above example shows channel 6 turned ON.
2 Line Binary Address Inputs (0 0) and = 1 Above example shows channels 1A and 1B turned ON.
LOGIC TRIP POINT REF GND LOGIC AX INPUT OR EN VLOGIC INTERFACE AND LEVEL SHIFTER