HomedatasheetDG526A

DG526A Datasheet

Multiplexers
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Description

Features, Applications

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Features

Direct RESET TTL and CMOS Compatible Address and Enable Inputs Maximum Power Supply Rating. 44V Break-Before-Make Switching Alternate Source

Description

The DG527, DG528, and DG529 are CMOS Monolithic 16-Channel/Dual 4-Channel Analog Multiplexers. Each device has on-chip address and control latches to simplify design in microprocessor based applications. The DG526 uses 4 address lines to control its 16 channels; the DG527, DG528 both use 3 address lines to control their 8 channels; and the DG529 uses 2 address lines to control its 4 channels. The enable pin is used to enable the address latches during the WR pulse. It can be hard wired to the logic supply if one of the channels will always be used (except during a reset) or it can be tied to address decoding circuitry for memory mapped operation. The RS pin is used to clear all latches regardless of the state of any other latch or control line. The WR pin is used to transfer the state of the address control lines to their latches, except during a reset or when EN is low. A channel in the ON state conducts signals equally well in both directions. In the OFF state each channel blocks voltages up to the supply rails. The address inputs, WR, RS and the enable input are TTL and CMOS compatible over the full specified operation temperature range.

Applications

Data Acquisition Systems Communication Systems Automatic Test Equipment Microprocessor Controlled Systemd

PART NUMBER DG527CK DG527CY TEMP. RANGE (oC) to 70 PACKAGE 28 Ld CERDIP 28 Ld CERDIP 28 Ld CERDIP 28 Ld SOIC 28 Ld PDIP 28 Ld CERDIP 28 Ld SOIC 28 Ld CERDIP 28 Ld CERDIP 28 Ld CERDIP 28 Ld SOIC 28 Ld PDIP 28 Ld CERDIP 28 Ld SOIC PKG. NO. F28.6 M28.3 PART NUMBER DG529CK DG529CY TEMP. RANGE (oC) to 70 PACKAGE 18 Ld CERDIP 18 Ld CERDIP 18 Ld CERDIP 18 Ld SOIC 18 Ld PDIP 18 Ld CERDIP 18 Ld SOIC 18 Ld CERDIP 18 Ld CERDIP 18 Ld CERDIP 18 Ld SOIC 18 Ld PDIP 18 Ld CERDIP 18 Ld SOIC PKG. NO. F18.3 M18.3

CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. Copyright

DECODER LOGIC AND LATCHES DECODER LOGIC LATCHES RS

Features

Parameters

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Manufacturer information

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