HomedatasheetDG528AZ

DG528AZ Datasheet

8-Channel, Latchable Multiplexer
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Features, Applications

Maxim's DG528/DG529 are monolithic, 8-channel, CMOS multiplexers with on-board address and control latches that simplify design and reduce board space in microprocessor-based applications. The is a single-ended, 1-of-8 multiplexer, while the is a differential, 2-of-8 multiplexer. These devices can operate as multiplexers or demultiplexers. The DG528/DG529 have break-before-make switching to prevent momentary shorting of the input signals. Each device operates with dual supplies or a single supply to +30V). All logic inputs are TTL and CMOS compatible. The Maxim DG528/DG529 are pin and electrically compatible with the industry-standard DG528/DG529.

o Low-Power, Monolithic CMOS Design o On-Board Address Latches o Break-Before-Make Input Switches o TTL and CMOS Logic Compatible o Microprocessor-Bus Compatible o rDS(ON) 400 o Pin and Electrically Compatible with the IndustryStandard DG528/DG529 and ADG528/ADG529

Data-Acquisition Systems Automatic Test Equipment Avionics and Military Systems Communication Systems Microprocessor-Controlled Systems Audio-Signal Multiplexing

+70�C 18 Wide +70�C 18 CERDIP to +70�C Dice* +85�C 18 Plastic DIP +85�C 20 PLCC +85�C 18 Wide +85�C 18 CERDIP +125�C 20 LCC** +125�C 18 CERDIP** Ordering Information continued at end of data sheet. * Contact factory for dice specifications. Contact factory for availability and processing to MIL-STD-883.

A0 A1 MUX AND A/D CONTROL DIFFERENTIAL INPUT FOR DATA-ACQUISITION SYSTEMS OUTA
Call toll free 1-800-998-8800 for free samples or literature.

Voltage Referenced VV+....................................................................................+44V GND.................................................................................+25V Digital Inputs VS, VD.................................................V- or 20mA, whichever occurs first. Current (any terminal, except or D).................................30mA Continuous Current, or D Peak Current, or D...........................................................20mA (pulsed 1ms, 10% duty cycle max)............................50mA Continuous Power Dissipation (TA = +70�C) (Note 1) 18-Pin Plastic DIP (derate 11.11mW/�C above +70�C)...889mW Note 1: All leads are soldered or welded to PC board.

Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

18-Pin Wide SO (derate 9.52mW/�C above +70�C)....762mW 18-Pin CERDIP (derate 10.53mW/�C above +70�C)....842mW 20-Pin PLCC (derate 10.00mW/�C above +70�C).......800mW 20-Pin LCC (derate 9.09mW/�C above +70�C)...........727mW Operating Temperature Ranges to +125�C Storage Temperature to +150�C Lead Temperature (soldering, 10sec).............................+300�C

(V+ = -15V, VEN TA = TMIN to TMAX, unless otherwise noted.) PARAMETER SWITCH Analog-Signal Range Drain-Source On-Resistance VANALOG (Note = �10V, VAL = -200�A, VAH = 2.4 (Note = +25�C, TMIN TA = TMAX V SYMBOL CONDITIONS MIN DG52_A DG52_C/D/E UNITS TYP MAX MIN TYP MAX

Greatest Change in DrainSource On-Resistance rDS(ON) < 10V Between Channels Source-Off Leakage Current IS(OFF) VEN = �10V VEN DG528 DG529

Drain-On Leakage Current (Notes 3, 4) INPUT Address Input Current, Input Voltage High

(V+ = -15V, VEN TA = TMIN to TMAX, unless otherwise noted.) PARAMETER DYNAMIC Switching Time of Multiplexer Break-Before-Make Interval Enable, Write Turn-On Time Enable, Reset Turn-Off Time Charge Injection Off Isolation Logic-Input Capacitance Source-Off Capacitance Drain-Off Capacitance SUPPLY Positive Supply Current Negative Supply Current MINIMUM INPUT TIMING WR Pulse Width AX, EN Data Valid to WR AX, EN Data Valid after WR RS Pulse Width Note 2: Note 3: Note 4: Note 5: tWW tDW tWD tRS Figure 7 (Stabilization Time) Figure 7 (Hold Time) Figure 7 Figure = 5V (Note ns I+ IVEN = VAH = 0V VEN = VAH +25�C mA tTRANS tOPEN Figure 1 Figure pC dB SYMBOL CONDITIONS DG52_A DG52_C/D/E UNITS TYP MAX MIN TYP MAX

tON(EN, WR) Figures 3, 4 tOFF(EN, RS) Figures 5 Q OIRR Figure 6

Guaranteed by design. Sequence each switch on. ID(ON) is leakage from driver into on switch. Reset pulse period must be at least 50�s during or after power-on.


Features

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Manufacturer information

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