Crosstalk: @ 5 MHz 300 MHz Bandwidth Low Input and Output Capacitance Low Power: 75 mW Low rDS(on): 50 W On-Board Address Latches Disable Output
D High Video Quality D Reduced Insertion Loss D Reduced Input Buffer Requirements D Minimizes Power Consumption D Simplifies Bus InterfaceAPPLICATIONS
Video Switching/Routing High Speed Data Routing RF Signal Multiplexing Precision Data Acquisition Crosspoint Arrays FLIR SystemsDESCRIPTION
The DG535/536 are 16-channel multiplexers designed for routing one of 16 wideband analog or digital input signals to a single output. They feature low input and output capacitance, low on-resistance, and n-channel DMOS "T" switches, resulting in wide bandwidth, low crosstalk and high "off" isolation. In the on state, the switches pass signals in either direction, allowing them to be used as multiplexers or as demultiplexers. and a low 75-mW power consumption vastly reduces power supply requirements.
Theses devices are built on a proprietary D/CMOS process which creates low-capacitance DMOS FETs and high-speed, low-power CMOS logic on the same substrate.
On-chip address latches and decode logic simplify microprocessor interface. Chip Select and Enable inputs simplify addressing in large matrices. Single-supply operation
For more information please refer to Vishay Siliconix Application Note AN501 (FaxBack document number 70608).TRUTH TABLES AND ORDERING INFORMATION ORDERING INFORMATION
Logic "0" = VAL 4.5 V Logic "1" = VAH X = Don't Care Notes: a. Strobe input (ST) is level triggered. b. Low Z, High Z = impedance of Disable Output to GND. Disable output sinks current when any channel is selected.
V+ to GND. +18 V Digital Inputs. (GND V) to (V+ plus or 20 mA, whichever occurs first VS, VD. (GND to V+ plus or 20 mA, whichever occurs first Current (any terminal) Continuous. 20 mA Current or D) Pulsed ms 10% duty cycle. 40 mA Storage Temperature (A Suffix). 150_C (D Suffix). to 125_C Notes: a. All leads soldered or welded to PC board. b. Derate 8.6 mW/_C above 75_C. c. Derate 16 mW/_C above 75_C. d. Derate 6 mW/_C above 75_C. e. Derate 11 mW/_C above 75_C. Document Number: 05-Oct-00 28-Pin Sidebrazec. mW 44-Pin PLCCd. mW 44-Pin Cerquade. 825 mWPower Dissipation (Package)a 28-Pin Plastic DIPb. 625 mW www.vishay.com
Test Conditions Unless Otherwise Specified Parameter Analog Switch
Analog Signal Rangee Drain-Source On-Resistance Resistance Match Source Off Leakage Current Drain On Leakage Current Disable Output VANALOG rDS(on) DrDS(on) IS(off) ID(on) RDISABLE = �1 mA, 10.5 V Sequence Each Switch 10.5 V IDISABLE = 1 mA, 10.5 V Full Room Full Room Full Room Full Room Full V W
Input Voltage High Input Voltage Low Address Input Current Address Input Capacitance VAIH VAIL IAI VA = GND or V+ Full Room Full pF V
PLCC On State Input Capacitancee CS(on) 3 V Cerquad DIP PLCC Off State Input Capacitancee CS(off) 3 V Cerquad DIP PLCC Off State Output Capacitancee Multiplexer Switching Time Break-Before-Make Interval EN, CS, ST, tON EN, CS, ST, tOFF Charge Injection CD(off) 3 V Cerquad DIP tTRANS tOPEN tON tOFF Q See Figure 4 See Figure 2 and 3 See Figure 2 See Figure 5 RIN = 75 MHz See Figure 9 RIN = 75 MHz 4.5 V See Figure 8 PLCC Cerquad DIP PLCC Cerquad DIP Room Full Room pF 45