MC100LVELT22 Datasheet

Logic - Translators


The MC100LVELT22 is a dual LVTTL/LVCMOS to differential LVPECLtranslator. Because LVPECL (Low Voltage Positive ECL) levels are used,only +3.3V and ground are required. The small outline 8-lead SOICpackage and the low skew, dual gate design of the LVELT22 makes itideal for applications which require the translation of a clock and a datasignal. MC100LVELT22 Features &bull; 350ps Typical Propagation Delay&bull; <100ps Output&ndash;to&ndash;Output Skew&bull; Differential LVPECL Outputs&bull; Small Outline SOIC Package&bull; Flow Through Pinouts


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