HomedatasheetMC14094BCPG

MC14094BCPG Datasheet

Counter Shift Registers
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Description

The MC14094BCPG combines an 8−stage shift register with a data latch for each stage and a 3−state output from each latch.Data is shifted on the positive clock transition and is shifted from the seventh stage to two serial outputs. The QS output data is for use in high−speed cascaded systems. The QS output data is shifted on the following negative clock transition for use in low−speed cascaded systems. MC14094BCPG Features • 3−State Outputs• Capable of Driving Two Low−Power TTL Loads or One Low−Power Schottky TTL Load Over the Rated Temperature Range• Input Diode Protection• Data Latch• Dual Outputs for Data Out on Both Positive and Negative Clock Transitions• Useful for Serial−to−Parallel Data Conversion• Pin−for−Pin Compatible with CD4094B• Pb−Free Packages are Available*
Features

Parameters

[{"Name":"Counting Sequence","Value":"Serial to Serial/Parallel"},{"Name":"Number of Circuits","Value":"2"},{"Name":"Package / Case","Value":"PDIP-16 "},{"Name":"Logic Family","Value":"MC14 "},{"Name":"Logic Type","Value":"CMOS "},{"Name":"Number of Input Lines","Value":"3"},{"Name":"Output Type","Value":"3-State "},{"Name":"Propagation Delay Time","Value":"840 ns, 390 ns, 270 ns "},{"Name":"Maximum Operating Temperature","Value":"+ 125 C "},{"Name":"Minimum Operating Temperature","Value":"- 55 C "}]

Manufacturer information

MCC
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