HomedatasheetNDS332P

NDS332P Datasheet

P-Channel Logic Level Enhancement Mode Field Effect Transistor
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Description

General Description
SuperSOTTM -3 P-Channel logic level enhancement mode power field effect transistors are produced using Fairchilds proprietary, high cell density, DMOS technology. This very high
density process is especially tailored to minimize on-state resistance.These devices are particularly suited for low voltage applications such as notebook computer power management, portable electronics,and other battery powered circuits where fast high-side switching, and low in-line power loss  are needed in a very small outline surface mount package.

Features
-1.2A, -20 V,  RDS(ON) = 0.27 W@ VGS = -2.7 V
                  RDS(ON) = 0.2 W@ VGS = -4.5 V.
Very low level gate drive requirements allowing direct operation in 3V circuits. VGS(th) < 1.0V.
Proprietary package design using copper lead frame for superior thermal and electrical capabilities.
High density cell design for extremely low RDS(ON)
Exceptional on-resistance and maximum DC current capability.
Compact industry standard SOT-23 surface Mount package.

Features

Parameters

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Manufacturer information

FAIRCHILD SEMICONDUCTOR

Fairchild has a rich history as a pioneer in the semiconductor industry and that pioneering spirit endures today. In an era where diversity can dilute focus and hamper innovation, we specialize in the development and manufacturing of a complete portfolio of low- to high-power solutions for the mobile, industrial, cloud, automotive, lighting, and computing industries. Fairchild is one of the most reliable partners in the industry, offering the shortest time from concept to silicon, expert FAEs for customer support, and a flexible, multi-source supply chain. Our vision is clear – anticipate the power efficiencies demanded by tomorrow’s electronic products and deliver an amazing design experience

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